Hi Marc, On Fri, Jan 28, 2022 at 12:18:36PM +0000, Marc Zyngier wrote: > From: Jintack Lim <[email protected]> > > With HCR_EL2.NV bit set, accesses to EL12 registers in the virtual EL2 > trap to EL2. Handle those traps just like we do for EL1 registers. > > One exception is CNTKCTL_EL12. We don't trap on CNTKCTL_EL1 for non-VHE > virtual EL2 because we don't have to. However, accessing CNTKCTL_EL12 > will trap since it's one of the EL12 registers controlled by HCR_EL2.NV > bit. Therefore, add a handler for it and don't treat it as a > non-trap-registers when preparing a shadow context. > > These registers, being only a view on their EL1 counterpart, are > permanently hidden from userspace. > > Signed-off-by: Jintack Lim <[email protected]> > [maz: EL12_REG(), register visibility] > Signed-off-by: Marc Zyngier <[email protected]> > --- > arch/arm64/kvm/sys_regs.c | 37 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 0c9bbe5eee5e..697bf0bca550 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1634,6 +1634,26 @@ static unsigned int el2_visibility(const struct > kvm_vcpu *vcpu, > .val = v, \ > } > > +/* > + * EL{0,1}2 registers are the EL2 view on an EL0 or EL1 register when > + * HCR_EL2.E2H==1, and only in the sysreg table for convenience of > + * handling traps. Given that, they are always hidden from userspace. > + */ > +static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu, > + const struct sys_reg_desc *rd) > +{ > + return REG_HIDDEN_USER; > +} > + > +#define EL12_REG(name, acc, rst, v) { \ > + SYS_DESC(SYS_##name##_EL12), \ > + .access = acc, \ > + .reset = rst, \ > + .reg = name##_EL1, \ > + .val = v, \ > + .visibility = elx2_visibility, \ > +} > + > /* sys_reg_desc initialiser for known cpufeature ID registers */ > #define ID_SANITISED(name) { \ > SYS_DESC(SYS_##name), \ > @@ -2194,6 +2214,23 @@ static const struct sys_reg_desc sys_reg_descs[] = { > EL2_REG(CNTVOFF_EL2, access_rw, reset_val, 0), > EL2_REG(CNTHCTL_EL2, access_rw, reset_val, 0), > > + EL12_REG(SCTLR, access_vm_reg, reset_val, 0x00C50078), > + EL12_REG(CPACR, access_rw, reset_val, 0), > + EL12_REG(TTBR0, access_vm_reg, reset_unknown, 0), > + EL12_REG(TTBR1, access_vm_reg, reset_unknown, 0), > + EL12_REG(TCR, access_vm_reg, reset_val, 0), > + { SYS_DESC(SYS_SPSR_EL12), access_spsr}, > + { SYS_DESC(SYS_ELR_EL12), access_elr}, > + EL12_REG(AFSR0, access_vm_reg, reset_unknown, 0), > + EL12_REG(AFSR1, access_vm_reg, reset_unknown, 0), > + EL12_REG(ESR, access_vm_reg, reset_unknown, 0), > + EL12_REG(FAR, access_vm_reg, reset_unknown, 0), > + EL12_REG(MAIR, access_vm_reg, reset_unknown, 0), > + EL12_REG(AMAIR, access_vm_reg, reset_amair_el1, 0), > + EL12_REG(VBAR, access_rw, reset_val, 0), > + EL12_REG(CONTEXTIDR, access_vm_reg, reset_val, 0), > + EL12_REG(CNTKCTL, access_rw, reset_val, 0),
Compared against Table D5-48 from ARM DDI 0487G.a (page D5-2768), everything looks correct to me: Reviewed-by: Alexandru Elisei <[email protected]> Thanks, Alex > + > EL2_REG(SP_EL2, NULL, reset_unknown, 0), > }; > > -- > 2.30.2 > _______________________________________________ kvmarm mailing list [email protected] https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
