Il ven 26 ago 2022, 17:50 Marc Zyngier <[email protected]> ha scritto: > userspace has no choice. It cannot order on its own the reads that the > kernel will do to *other* rings. > > The problem isn't on CPU0 The problem is that CPU1 does observe > inconsistent data on arm64, and I don't think this difference in > behaviour is acceptable. Nothing documents this, and there is a baked > in assumption that there is a strong ordering between writes as well > as between writes and read. >
Nevermind, what I wrote last Saturday doesn't make sense. I will try to put together a litmus test but IMO the synchronization is just between userspace and kernel, because the dirty page ring is essentially two ring buffers in one. The actual producer of dirty pages is a red herring. I am HTML-only for a couple days, I will resend to the mailing list on Thursday. Paolo >
_______________________________________________ kvmarm mailing list [email protected] https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
