The arm/pmu test prints the value of counters as %ld. Most tests start
with counters around 0 or UINT_MAX, so having something like -16 instead of
0xffff_fff0 is not very useful.
Report counter values as hexadecimals.
Reported-by: Alexandru Elisei <alexandru.eli...@arm.com>
Signed-off-by: Ricardo Koller <ricar...@google.com>
---
arm/pmu.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arm/pmu.c b/arm/pmu.c
index 680623d..b6b2871 100644
--- a/arm/pmu.c
+++ b/arm/pmu.c
@@ -537,8 +537,8 @@ static void test_mem_access(bool overflow_at_64bits)
write_sysreg_s(0x3, PMCNTENSET_EL0);
isb();
mem_access_loop(addr, 20, pmu.pmcr_ro | PMU_PMCR_E | pmcr_lp);
- report_info("counter #0 is %ld (MEM_ACCESS)", read_regn_el0(pmevcntr,
0));
- report_info("counter #1 is %ld (MEM_ACCESS)", read_regn_el0(pmevcntr,
1));
+ report_info("counter #0 is 0x%lx (MEM_ACCESS)", read_regn_el0(pmevcntr,
0));
+ report_info("counter #1 is 0x%lx (MEM_ACCESS)", read_regn_el0(pmevcntr,
1));
/* We may measure more than 20 mem access depending on the core */
report((read_regn_el0(pmevcntr, 0) == read_regn_el0(pmevcntr, 1)) &&
(read_regn_el0(pmevcntr, 0) >= 20) && !read_sysreg(pmovsclr_el0),
@@ -553,7 +553,7 @@ static void test_mem_access(bool overflow_at_64bits)
mem_access_loop(addr, 20, pmu.pmcr_ro | PMU_PMCR_E | pmcr_lp);
report(read_sysreg(pmovsclr_el0) == 0x3,
"Ran 20 mem accesses with expected overflows on both counters");
- report_info("cnt#0 = %ld cnt#1=%ld overflow=0x%lx",
+ report_info("cnt#0=0x%lx cnt#1=0x%lx overflow=0x%lx",
read_regn_el0(pmevcntr, 0), read_regn_el0(pmevcntr, 1),
read_sysreg(pmovsclr_el0));
}
@@ -584,7 +584,7 @@ static void test_sw_incr(bool overflow_at_64bits)
write_sysreg(0x1, pmswinc_el0);
isb();
- report_info("SW_INCR counter #0 has value %ld", read_regn_el0(pmevcntr,
0));
+ report_info("SW_INCR counter #0 has value 0x%lx",
read_regn_el0(pmevcntr, 0));
report(read_regn_el0(pmevcntr, 0) == pre_overflow,
"PWSYNC does not increment if PMCR.E is unset");
@@ -604,7 +604,7 @@ static void test_sw_incr(bool overflow_at_64bits)
(uint64_t)pre_overflow + 100;
report(read_regn_el0(pmevcntr, 0) == cntr0, "counter #0 after + 100
SW_INCR");
report(read_regn_el0(pmevcntr, 1) == 100, "counter #1 after + 100
SW_INCR");
- report_info("counter values after 100 SW_INCR #0=%ld #1=%ld",
+ report_info("counter values after 100 SW_INCR #0=0x%lx #1=0x%lx",
read_regn_el0(pmevcntr, 0), read_regn_el0(pmevcntr, 1));
report(read_sysreg(pmovsclr_el0) == 0x1,
"overflow on counter #0 after 100 SW_INCR");
@@ -680,7 +680,7 @@ static void test_chained_sw_incr(bool unused)
report((read_sysreg(pmovsclr_el0) == 0x1) &&
(read_regn_el0(pmevcntr, 1) == 1),
"overflow and chain counter incremented after 100
SW_INCR/CHAIN");
- report_info("overflow=0x%lx, #0=%ld #1=%ld", read_sysreg(pmovsclr_el0),
+ report_info("overflow=0x%lx, #0=0x%lx #1=0x%lx",
read_sysreg(pmovsclr_el0),
read_regn_el0(pmevcntr, 0), read_regn_el0(pmevcntr, 1));
/* 64b SW_INCR and overflow on CHAIN counter*/
@@ -705,7 +705,7 @@ static void test_chained_sw_incr(bool unused)
(read_regn_el0(pmevcntr, 0) == cntr0) &&
(read_regn_el0(pmevcntr, 1) == cntr1),
"expected overflows and values after 100 SW_INCR/CHAIN");
- report_info("overflow=0x%lx, #0=%ld #1=%ld", read_sysreg(pmovsclr_el0),
+ report_info("overflow=0x%lx, #0=0x%lx #1=0x%lx",
read_sysreg(pmovsclr_el0),
read_regn_el0(pmevcntr, 0), read_regn_el0(pmevcntr, 1));
}
@@ -737,11 +737,11 @@ static void test_chain_promotion(bool unused)
mem_access_loop(addr, 20, pmu.pmcr_ro | PMU_PMCR_E);
report(!read_regn_el0(pmevcntr, 1) && (read_sysreg(pmovsclr_el0) ==
0x1),
"odd counter did not increment on overflow if disabled");
- report_info("MEM_ACCESS counter #0 has value %ld",
+ report_info("MEM_ACCESS counter #0 has value 0x%lx",
read_regn_el0(pmevcntr, 0));
- report_info("CHAIN counter #1 has value %ld",
+ report_info("CHAIN counter #1 has value 0x%lx",
read_regn_el0(pmevcntr, 1));
- report_info("overflow counter %ld", read_sysreg(pmovsclr_el0));
+ report_info("overflow counter 0x%lx", read_sysreg(pmovsclr_el0));
/* start at 0xFFFFFFDC, +20 with CHAIN enabled, +20 with CHAIN disabled
*/
pmu_reset();
--
2.39.0.314.g84b9a713c41-goog
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