Hi, On Tue May 13, 2014 at 16:48:58 +1000, Peter Howard wrote: > I'm trying to port Fiasco to the DA850. I'm basing this on the > 2014022818 snapshot. I've gotten to the point where I've modified the > configuration for both fiasco and l4re, added the BSP and bootstrap > platform files, and added the extra drivers I need to get started. I > can build an image to load on the machine and it boots through the > kernel fine. Then it tries to run sigma0 and gets a prefetch abort: > > EXCEPTION: prefetch abort pfa=c0090100, error=0033000d > > R[0]: c0002000 00000000 00000000 00000000 00000000 00000000 00000000 > 00000000 > R[8]: 00000000 00000000 00000000 00000000 00000000 c1013de4 04080124 > c0090100 > > (note, I'm including the full boot output at the end of the email) > > The address, c0090100, is correct as the entry point for sigma0. > > Now, if I'm reading the FSR right, that's indicating a permission error > on the section. But nothing I've added/changed has anything to do with > the MMU/mapping. As far as I can see, that's all straight armv5 code, > with nothing special to the board (which uses an arm926ejs core). > > So any idea why sigma0 would be getting mappings with the wrong > permission?
Since RAM starts at 3GB physically, I'm wondering whether you set the 'kern_start_0xd' preprocessor tag in your Modules bsp-file (PREPROCESS_PARTS += kern_start_0xd)? Adam -- Adam [email protected] Lackorzynski http://os.inf.tu-dresden.de/~adam/ _______________________________________________ l4-hackers mailing list [email protected] http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers
