Hans-Peter Diettrich wrote:
Please note that even a CPU with multiple cores doesn't have multiple data busses for the cores. That's the narrowest bottleneck, which limits
That's a good point, but strictly it's an implementation detail which could be very different on even different chips of the same architecture.
the throughput on every standard machine. Next comes the DMA over one common data bus, which again limits the overall throughput. When instead you spend each camera its own small machine and monitor, the overall throughput can be increased (scaled) without limitations.
But some CPU types have multiple "hoses" each driving a group of PCI busses with a processor in the middle. And plenty of larger systems are NUMA to a greater or lesser extent, with provision for some peripherals to be nearer one CPU (and bank of memory etc.) than others.
Particularly on systems with some sort of "interconnect" between processor units, it's entirely possible to find the threads associated with a single program spread over a comparatively large physical volume, with each thread able to talk efficiently to "nearby" peripherals. The result of that is that data (e.g. video) collected from the peripherals can be got into memory without contention.
Being able to use multiple threads to marshal that data into e.g. a video collage would be desirable, making the assumption that the user would choose appropriate hardware. And if X or OpenGL imposes crippling overhead I don't see that as our problem, provided that we've done our bit to work as well as possible within the limitations.
-- Mark Morgan Lloyd markMLl .AT. telemetry.co .DOT. uk [Opinions above are the author's, not those of his employers or colleagues] -- _______________________________________________ Lazarus mailing list [email protected] http://lists.lazarus.freepascal.org/mailman/listinfo/lazarus
