On 13 May 2013 22:17, Bob Friesenhahn <bfrie...@simple.dallas.tx.us> wrote: > What specific CPU are you using?
I'm profiling on Intel i7 M620 @ 2.67GHz > It would be good to share the ICC profile you are using for testing since it > can make a difference. If lcms is only doing indexed lookups for the > profile, then memory accesses may be the bottleneck rather than CPU. I'm using this 2009 test profile I generated with ArgyllCMS: https://github.com/hughsie/colord/blob/master/data/tests/ibm-t61.icc?raw=true > Are you sharing the same transform (created by one thread), or are you > creating an independent transform for each thread (ideally created by the > thread which uses it)? One transform shared between threads. I can try to create multiple transforms (and also in each thread) if you think that will help things. > Cache-line effects can be significant if there is accidental cache-line > sharing (two cores sharing data in the same cache line). Padding structures > to prevent false-sharing or using an aligned memory allocator can help > surmount such problems. Cache line issues can be very hardware/OS specific > and mysterious. Which structure is sensitive to the padding? Thanks! Richard. ------------------------------------------------------------------------------ AlienVault Unified Security Management (USM) platform delivers complete security visibility with the essential security capabilities. Easily and efficiently configure, manage, and operate all of your security controls from a single console and one unified framework. Download a free trial. http://p.sf.net/sfu/alienvault_d2d _______________________________________________ Lcms-user mailing list Lcms-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/lcms-user