* use a copy and modify version of the UBNT-ERX for the UBNT-ERX-SFP * define i2c-gpio via DTS (Linux/Documentation/devicetree/bindings/i2c/i2c-gpio.txt) * also define PCA9555 for PoE-switching in DTS --- target/linux/ramips/dts/UBNT-ERX-SFP.dts | 121 +++++++++++++++++++++++++++++++ target/linux/ramips/image/mt7621.mk | 2 +- 2 files changed, 122 insertions(+), 1 deletion(-) create mode 100644 target/linux/ramips/dts/UBNT-ERX-SFP.dts
diff --git a/target/linux/ramips/dts/UBNT-ERX-SFP.dts b/target/linux/ramips/dts/UBNT-ERX-SFP.dts new file mode 100644 index 0000000..808086a --- /dev/null +++ b/target/linux/ramips/dts/UBNT-ERX-SFP.dts @@ -0,0 +1,121 @@ +#include <dt-bindings/input/input.h> + +/dts-v1/; + +#include "mt7621.dtsi" + +/ { + model = "UBNT-ERX-SFP"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <20>; + + reset { + label = "reset"; + gpios = <&gpio0 12 1>; + linux,code = <KEY_RESTART>; + }; + }; + + i2c-gpio { + compatible = "i2c-gpio"; + gpios = <&gpio0 3 0 /* sda */ + &gpio0 4 0 /* scl */ + >; + #address-cells = <1>; + #size-cells = <0>; + + pca9555@25 { + compatible = "pca9555"; + reg = <0x25>; + }; + }; +}; + +ðernet { + mtd-mac-address = <&factory 0x22>; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "u-boot-env"; + reg = <0x80000 0x60000>; + read-only; + }; + + factory: partition@e0000 { + label = "factory"; + reg = <0xe0000 0x60000>; + }; + + partition@140000 { + label = "kernel1"; + reg = <0x140000 0x300000>; + }; + + partition@440000 { + label = "kernel2"; + reg = <0x440000 0x300000>; + }; + + partition@740000 { + label = "ubi"; + reg = <0x740000 0xf7c0000>; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag"; + ralink,function = "gpio"; + }; + }; +}; + +&spi0 { + /* This board has 2Mb spi flash soldered in and visible + from manufacturer's firmware. + But this SoC shares spi and nand pins, + and current driver does't handle this sharing well */ + status = "disabled"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <1>; + spi-max-frequency = <10000000>; + m25p,chunked-io = <32>; + + partition@0 { + label = "spi"; + reg = <0x0 0x200000>; + read-only; + }; + }; +}; + +&xhci { + status = "disabled"; +}; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index 22b04d9..f65449a 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -177,7 +177,7 @@ endef TARGET_DEVICES += ubnt-erx define Device/ubnt-erx-sfp - DTS := UBNT-ERX + DTS := UBNT-ERX-SFP FILESYSTEMS := squashfs KERNEL_SIZE := 3145728 KERNEL := $(KERNEL_DTB) | uImage lzma -- 2.1.4 _______________________________________________ Lede-dev mailing list Lede-dev@lists.infradead.org http://lists.infradead.org/mailman/listinfo/lede-dev