Module: libav Branch: master Commit: d00bb8addccb63fa3feacb06d2a310731dc0113b
Author: Vicente Olivert Riera <Vincent.Riera at imgtec.com> Committer: Luca Barbato <[email protected]> Date: Fri Sep 25 08:56:25 2015 +0200 mips: intreadwrite: Only execute that code for mips r1 or r2 MIPS R6 supports unaligned memory access and does not have the load/store-left/right family of instructions. Signed-off-by: Vicente Olivert Riera <Vincent.Riera at imgtec.com> Signed-off-by: Luca Barbato <lu_zero at gentoo.org> Signed-off-by: Luca Barbato <[email protected]> --- libavutil/mips/intreadwrite.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/libavutil/mips/intreadwrite.h b/libavutil/mips/intreadwrite.h index 4dabbe6..0db3da5 100644 --- a/libavutil/mips/intreadwrite.h +++ b/libavutil/mips/intreadwrite.h @@ -24,7 +24,13 @@ #include <stdint.h> #include "config.h" -#if ARCH_MIPS64 && HAVE_INLINE_ASM +/* + * GCC actually handles unaligned accesses correctly in all cases + * except, absurdly, 32-bit loads on mips64. + * + * https://git.libav.org/?p=libav.git;a=commit;h=b82b49a5b774b6ad9119e981c72b8f594fee2ae0 + */ +#if HAVE_MIPS64R2_INLINE || HAVE_MIPS64R1_INLINE #define AV_RN32 AV_RN32 static av_always_inline uint32_t AV_RN32(const void *p) @@ -41,6 +47,6 @@ static av_always_inline uint32_t AV_RN32(const void *p) return v; } -#endif /* ARCH_MIPS64 && HAVE_INLINE_ASM */ +#endif /* HAVE_MIPS64R2_INLINE || HAVE_MIPS64R1_INLINE */ #endif /* AVUTIL_MIPS_INTREADWRITE_H */ _______________________________________________ libav-commits mailing list [email protected] https://lists.libav.org/mailman/listinfo/libav-commits
