On 22/02/14 17:42, James Almer wrote:
> On 22/02/14 1:29 PM, Luca Barbato wrote:
>> On 22/02/14 06:53, James Almer wrote:
>>> These are the missing instruction sets introduced with Haswell/Piledriver 
>>> CPUs.
>>>
>>> Last two patches are based on x264 detection code.
>>
>> The set doesn't look bad at all but I'm wondering about it's usage:
>>
>>> James Almer (3):
>>>   x86: add missing XOP checks and macros
>>>   x86: add detection for FMA3 instruction set
>>
>> Which is the relationship between FMA3 and FMA4 ?
>>
> 
> It's what happens when Intel and AMD don't talk to each other to coordinate 
> stuff.
> Short story summary here: https://en.wikipedia.org/wiki/FMA_instruction_set
> 
> Both sets do the same in essence. The only difference is that one uses three 
> operands 
> while the other uses four (Technically, FMA4 is the most flexible, but it's 
> only 
> supported by AMD).
> AMD added FMA4 starting with Bulldozer, then added FMA3 as well to Piledriver 
> for 
> compatibility reasons once Intel revealed they would use that starting with 
> Haswell.
> 
>>>   x86: add detection for Bit Manipulation Instruction sets
>>
>> Is BMI a subset of AVX2?
> 
> No, they are independent and work on general registers.
> AMD added BMI1 starting with Piledriver, which doesn't support AVX2, whereas 
> Intel 
> added both BMI1 and BMI2 starting with Haswell.
> 

So complex as usual...

I'd let another day pass (hoping somebody else reads those and push them.

lu


_______________________________________________
libav-devel mailing list
[email protected]
https://lists.libav.org/mailman/listinfo/libav-devel

Reply via email to