On 13/03/14 23:58, Vittorio Giovara wrote:
> From: Peter Krefting <[email protected]>
> 
> The DCBZL instruction is not available for the e500v1 and e500v2
> architectures, but may still be recognized by the toolchain, so we need to
> remove the test for it explicitly for these architectures.
> 
> References: PowerPC™ e500 Core Family Reference Manual (Freescale)
> 
> Found-by: Ståle Kristoffersen <[email protected]>
> ---
>  configure | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/configure b/configure
> index 7051a76..a750ca8 100755
> --- a/configure
> +++ b/configure
> @@ -3709,7 +3709,8 @@ elif enabled ppc; then
>  
>      enable local_aligned_8 local_aligned_16
>  
> -    check_inline_asm dcbzl     '"dcbzl 0, %0" :: "r"(0)'
> +    [ $cpu != e500 -a $cpu != e500v2 ] &&
> +     check_inline_asm dcbzl    '"dcbzl 0, %0" :: "r"(0)'
>      check_inline_asm ibm_asm   '"add 0, 0, 0"'
>      check_inline_asm ppc4xx    '"maclhw r10, r11, r12"'
>      check_inline_asm xform_asm '"lwzx %1, %y0" :: "Z"(*(int*)0), "r"(0)'
> 

Not sure but we should have a way to disable it from the cpu/arch section.

lu
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