From: Rodger Combs <[email protected]>
Signed-off-by: Vittorio Giovara <[email protected]>
---
configure | 4 ++++
doc/APIchanges | 4 ++++
libavutil/cpu.c | 3 +++
libavutil/cpu.h | 1 +
libavutil/x86/cpu.c | 2 ++
libavutil/x86/cpu.h | 3 +++
libavutil/x86/x86inc.asm | 13 +++++++------
tests/checkasm/checkasm.c | 1 +
8 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/configure b/configure
index f5a9a26..3b6837c 100755
--- a/configure
+++ b/configure
@@ -298,6 +298,7 @@ Optimization options (experts only):
--disable-fma3 disable FMA3 optimizations
--disable-fma4 disable FMA4 optimizations
--disable-avx2 disable AVX2 optimizations
+ --disable-aesni disable AESNI optimizations
--disable-armv5te disable armv5te optimizations
--disable-armv6 disable armv6 optimizations
--disable-armv6t2 disable armv6t2 optimizations
@@ -1347,6 +1348,7 @@ ARCH_EXT_LIST_ARM="
"
ARCH_EXT_LIST_X86_SIMD="
+ aesni
amd3dnow
amd3dnowext
avx
@@ -1780,6 +1782,7 @@ sse3_deps="sse2"
ssse3_deps="sse3"
sse4_deps="ssse3"
sse42_deps="sse4"
+aesni_deps="sse42"
avx_deps="sse42"
xop_deps="avx"
fma3_deps="avx"
@@ -4885,6 +4888,7 @@ if enabled x86; then
echo "3DNow! extended enabled ${amd3dnowext-no}"
echo "SSE enabled ${sse-no}"
echo "SSSE3 enabled ${ssse3-no}"
+ echo "AESNI enabled ${aesni-no}"
echo "AVX enabled ${avx-no}"
echo "XOP enabled ${xop-no}"
echo "FMA3 enabled ${fma3-no}"
diff --git a/doc/APIchanges b/doc/APIchanges
index d301bd5..383be42 100644
--- a/doc/APIchanges
+++ b/doc/APIchanges
@@ -12,6 +12,10 @@ libavutil: 2015-08-28
API changes, most recent first:
+
+2015-xx-xx - xxxxxxx - lavu 55.0.0 - cpu.h
+ Add AV_CPU_FLAG_AESNI support.
+
2015-xx-xx - xxxxxxx - lavc 57.6.0 - avcodec.h
2015-xx-xx - lavc 57.7.0 - avcodec.h
diff --git a/libavutil/cpu.c b/libavutil/cpu.c
index e24b9dd..e8280ac 100644
--- a/libavutil/cpu.c
+++ b/libavutil/cpu.c
@@ -92,6 +92,7 @@ int av_parse_cpu_flags(const char *s)
#define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)
#define CPUFLAG_AVX2 (AV_CPU_FLAG_AVX2 | CPUFLAG_AVX)
#define CPUFLAG_BMI2 (AV_CPU_FLAG_BMI2 | AV_CPU_FLAG_BMI1)
+#define CPUFLAG_AESNI (AV_CPU_FLAG_AESNI | CPUFLAG_SSE42)
static const AVOption cpuflags_opts[] = {
{ "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN,
INT64_MAX, .unit = "flags" },
#if ARCH_PPC
@@ -119,6 +120,7 @@ int av_parse_cpu_flags(const char *s)
{ "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW
}, .unit = "flags" },
{ "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT
}, .unit = "flags" },
{ "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV
}, .unit = "flags" },
+ { "aesni" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AESNI
}, .unit = "flags" },
#elif ARCH_ARM
{ "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE
}, .unit = "flags" },
{ "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6
}, .unit = "flags" },
@@ -231,6 +233,7 @@ static const struct {
{ AV_CPU_FLAG_AVX2, "avx2" },
{ AV_CPU_FLAG_BMI1, "bmi1" },
{ AV_CPU_FLAG_BMI2, "bmi2" },
+ { AV_CPU_FLAG_AESNI, "aesni" },
#endif
{ 0 }
};
diff --git a/libavutil/cpu.h b/libavutil/cpu.h
index 9c77ce6..3bf293b 100644
--- a/libavutil/cpu.h
+++ b/libavutil/cpu.h
@@ -41,6 +41,7 @@
#define AV_CPU_FLAG_ATOM 0x10000000 ///< Atom processor, some SSSE3
instructions are slower
#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
+#define AV_CPU_FLAG_AESNI 0x80000 ///< Advanced Encryption Standard
functions
#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS
support even if YMM registers aren't used
#define AV_CPU_FLAG_AVXSLOW 0x8000000 ///< AVX supported, but slow when
using YMM registers (e.g. Bulldozer)
#define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions
diff --git a/libavutil/x86/cpu.c b/libavutil/x86/cpu.c
index 098ccf7..8412e73 100644
--- a/libavutil/x86/cpu.c
+++ b/libavutil/x86/cpu.c
@@ -126,6 +126,8 @@ int ff_get_cpu_flags_x86(void)
rval |= AV_CPU_FLAG_SSE4;
if (ecx & 0x00100000 )
rval |= AV_CPU_FLAG_SSE42;
+ if (ecx & 0x01000000 )
+ rval |= AV_CPU_FLAG_AESNI;
#if HAVE_AVX
/* Check OXSAVE and AVX bits */
if ((ecx & 0x18000000) == 0x18000000) {
diff --git a/libavutil/x86/cpu.h b/libavutil/x86/cpu.h
index 0695436..d161cbb 100644
--- a/libavutil/x86/cpu.h
+++ b/libavutil/x86/cpu.h
@@ -47,6 +47,7 @@
#define X86_FMA3(flags) CPUEXT(flags, FMA3)
#define X86_FMA4(flags) CPUEXT(flags, FMA4)
#define X86_AVX2(flags) CPUEXT(flags, AVX2)
+#define X86_AESNI(flags) CPUEXT(flags, AESNI)
#define EXTERNAL_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AMD3DNOW)
#define EXTERNAL_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _EXTERNAL,
AMD3DNOWEXT)
@@ -69,6 +70,7 @@
#define EXTERNAL_FMA3(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA3)
#define EXTERNAL_FMA4(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA4)
#define EXTERNAL_AVX2(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AVX2)
+#define EXTERNAL_AESNI(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AESNI)
#define INLINE_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOW)
#define INLINE_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOWEXT)
@@ -91,6 +93,7 @@
#define INLINE_FMA3(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA3)
#define INLINE_FMA4(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA4)
#define INLINE_AVX2(flags) CPUEXT_SUFFIX(flags, _INLINE, AVX2)
+#define INLINE_AESNI(flags) CPUEXT_SUFFIX(flags, _INLINE, AESNI)
void ff_cpu_cpuid(int index, int *eax, int *ebx, int *ecx, int *edx);
void ff_cpu_xgetbv(int op, int *eax, int *edx);
diff --git a/libavutil/x86/x86inc.asm b/libavutil/x86/x86inc.asm
index 6ad9785..9f1b2ae 100644
--- a/libavutil/x86/x86inc.asm
+++ b/libavutil/x86/x86inc.asm
@@ -772,6 +772,7 @@ BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg, jge,
jng, jnge, ja, jae,
%assign cpuflags_atom (1<<21)
%assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt
%assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1
+%assign cpuflags_aesni (1<<24)|cpuflags_sse42
%define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
%define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
@@ -1170,12 +1171,12 @@ AVX_INSTR addsd, sse2, 1, 0, 1
AVX_INSTR addss, sse, 1, 0, 1
AVX_INSTR addsubpd, sse3, 1, 0, 0
AVX_INSTR addsubps, sse3, 1, 0, 0
-AVX_INSTR aesdec, fnord, 0, 0, 0
-AVX_INSTR aesdeclast, fnord, 0, 0, 0
-AVX_INSTR aesenc, fnord, 0, 0, 0
-AVX_INSTR aesenclast, fnord, 0, 0, 0
-AVX_INSTR aesimc
-AVX_INSTR aeskeygenassist
+AVX_INSTR aesdec, aesni, 0, 0, 0
+AVX_INSTR aesdeclast, aesni, 0, 0, 0
+AVX_INSTR aesenc, aesni, 0, 0, 0
+AVX_INSTR aesenclast, aesni, 0, 0, 0
+AVX_INSTR aesimc, aesni
+AVX_INSTR aeskeygenassist, aesni
AVX_INSTR andnpd, sse2, 1, 0, 0
AVX_INSTR andnps, sse, 1, 0, 0
AVX_INSTR andpd, sse2, 1, 0, 1
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index 9219a83..c14364a 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -103,6 +103,7 @@ static const struct {
{ "SSSE3", "ssse3", AV_CPU_FLAG_SSSE3|AV_CPU_FLAG_ATOM },
{ "SSE4.1", "sse4", AV_CPU_FLAG_SSE4 },
{ "SSE4.2", "sse42", AV_CPU_FLAG_SSE42 },
+ { "AES-NI", "aesni", AV_CPU_FLAG_AESNI },
{ "AVX", "avx", AV_CPU_FLAG_AVX },
{ "XOP", "xop", AV_CPU_FLAG_XOP },
{ "FMA3", "fma3", AV_CPU_FLAG_FMA3 },
--
1.9.5 (Apple Git-50.3)
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