On Tue, 18 Apr 2017, Alexandra Hájková wrote:

From: Seppo Tomperi <[email protected]>

Signed-off-by: Alexandra Hájková <[email protected]>
---
libavcodec/arm/hevc_idct.S        | 71 +++++++++++++++++++++++++++++++++++++++
libavcodec/arm/hevcdsp_init_arm.c | 15 +++++++++
2 files changed, 86 insertions(+)

diff --git a/libavcodec/arm/hevc_idct.S b/libavcodec/arm/hevc_idct.S
index 082f832..0e84034 100644
--- a/libavcodec/arm/hevc_idct.S
+++ b/libavcodec/arm/hevc_idct.S
@@ -30,6 +30,77 @@ const trans, align=4
        .short 57, 43, 25, 9
endconst

+function ff_hevc_add_residual_4x4_8_neon, export=1
+        vldm            r1, {q0-q1}

This could also be a vld1 like this, to allow specifying the alignment:
vld1.16 {q0-q1}, [r1, :128]

I'm not really sure if it makes any difference speedwise; the vld1 version seems to maybe give a fraction of a cycle faster times on A8.

+        vld1.32         d4[0], [r0], r2
+        vld1.32         d4[1], [r0], r2
+        vld1.32         d5[0], [r0], r2
+        vld1.32         d5[1], [r0], r2

These can probably use alignment :32

+        sub             r0, r0, r2, lsl #2
+        vmovl.u8        q8, d4
+        vmovl.u8        q9, d5
+        vqadd.s16       q0, q0, q8
+        vqadd.s16       q1, q1, q9

If we can be sure that there won't be overflow at this step (can we?), we could use vaddw instead of the separate vmovl+vqadd.

+        vqmovun.s16     d0, q0
+        vqmovun.s16     d1, q1
+        vst1.32         d0[0], [r0], r2
+        vst1.32         d0[1], [r0], r2
+        vst1.32         d1[0], [r0], r2
+        vst1.32         d1[1], [r0], r2
+        bx              lr
+endfunc
+
+function ff_hevc_add_residual_8x8_8_neon, export=1
+        mov             r3,   #8
+1:      subs            r3,   #1
+        vld1.16         {q0}, [r1]!

Alignment

+        vld1.8          d16,  [r0]

Alignment

+        vmovl.u8        q8,   d16
+        vqadd.s16       q0,   q8
+        vqmovun.s16     d0,   q0
+        vst1.32         d0,   [r0], r2

The .32 size specifier here feels misleading; make it .8 as for the load to d16, since that's what it is - 8 bit pixels.

Also: Alignment

+        bne             1b
+        bx              lr
+endfunc

This can be unrolled so that you process 2 rows at a time.

When I tested unrolling and adding alignment here, I got a speedup from 197 cycles to 59 cycles, i.e. over 3x faster, on the A8. On A53, you should get from around 128 cycles to 84.

+
+function ff_hevc_add_residual_16x16_8_neon, export=1
+        mov             r3,   #16
+1:      subs            r3,   #1
+        vld1.16         {q0, q1}, [r1]!
+        vld1.8          {q8},  [r0]
+        vmovl.u8        q9,  d16
+        vmovl.u8        q10, d17
+        vqadd.s16       q0,  q9
+        vqadd.s16       q1,  q10
+        vqmovun.s16     d0,  q0
+        vqmovun.s16     d1,  q1
+        vst1.8          {q0},   [r0], r2
+        bne             1b
+        bx              lr
+endfunc

Try adding alignment specifiers, and unroll it

+
+function ff_hevc_add_residual_32x32_8_neon, export=1
+        mov             r3,   #32
+1:      subs            r3,   #1
+        vldm            r1!, {q0-q3}
+        vld1.8          {q8, q9},  [r0]
+        vmovl.u8        q10, d16
+        vmovl.u8        q11, d17
+        vmovl.u8        q12, d18
+        vmovl.u8        q13, d19
+        vqadd.s16       q0,  q10
+        vqadd.s16       q1,  q11
+        vqadd.s16       q2,  q12
+        vqadd.s16       q3,  q13
+        vqmovun.s16     d0,  q0
+        vqmovun.s16     d1,  q1
+        vqmovun.s16     d2,  q2
+        vqmovun.s16     d3,  q3
+        vst1.8          {q0, q1},   [r0], r2
+        bne             1b
+        bx              lr
+endfunc
+

You could experiment and see if unrolling helps here as well, and of course add alignment specifiers.

// Martin
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