On Tue, Feb 21, 2012 at 05:59:39PM +0200, Anton Kirilov
<[email protected]> wrote:
> I have attached my implementation of a memory fence on MIPS. Unfortunately, I
> have been unable to test it extensively, since I only have access to
> MIPS-based SoCs that are single core, but I have based it on the MIPS32
> architecture manual (
> http://mips.com/products/architectures/mips32/#specifications ), and the code
> is consistent with what is generated by GCC. Actually, it is the same for
> MIPS64.
Thanks - "not tested extensively" means that you actually did compile and run
it though? That is quite enough for me.
> + #elif defined(__mips)
> + #define ECB_MEMORY_FENCE __asm__ __volatile__ ("sync" : : :
> "memory")
predef lists __mips__ as preferred symbol for gcc on mips - could you see
whether this works with __mips__ as well?
(I applied it with __mips__ in the meantime).
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