Hi libftdi developers,
I'm working on a 200Mb/s ring network built out of lattice FPGA chips using oversampled clock and data recovery. I'd like to communicate with the master node using an FTDI 2232H synchronous FIFO. Basically, I'd like to burst command packets into the master node (a sequence of bytes), and then check for and receive any reply bytes as available. The peak throughput of the network is 100mb/s, but I'd be happy to do 1/4 of that. I found a promising open source verilog for the FPGA side: https://github.com/6thimage/FT245_interface <https://github.com/6thimage/FT245_interface> <https://github.com/6thimage/FT245_interface> Is there a known working example code for reading/writing from a synchronous USB2.0 chip? The example in the source code is read only with (as near as I can tell) issues on writing. I'd like the speed of synchronous, but I'd be willing to start with asynch if that works too. kind regards, -- Rick Walker ________________________________ From: [email protected] <[email protected]> Sent: Wednesday, November 8, 2017 6:07 PM To: WALKER,RICK (A-Santa Clara,ex1) Subject: Welcome to [email protected] Welcome! You have been subscribed to the [email protected] mailinglist. To unsubscribe send a message to: [email protected] And for help send a message to: [email protected] -- libftdi - see http://www.intra2net.com/en/developer/libftdi for details. To unsubscribe send a mail to [email protected]
