On Wed, 16 Sep 2009 18:47:42 +0530 (IST), Giridhar Tammana
<giri_tamm...@yahoo.co.in> wrote:
> On NEON alignment,
> There can be lot improvement in performance if buffers are aligned. Also
> interleaving stores would not throttle the store buffer.
> Maximum outstanding stores can be 8 dregisters.

IOW, we can spare one cycle per load or store with appropriate alignment.
That's what I said.

> There are no intrinsic for specifying alignment.

I do not think anyone proposed to use intrinsic functions. This patch uses
in-line assembly. Plain assembly should be used for further optimization
(I'd rather not unroll in-line assembly).

> So to get maximum memory bandwidth one has to align buffers and also use
> special instructions specifiers.

I think we cannot align buffers at least in some cases. Namely the X and XY
cases, some buffers are read with one byte offset... so at least one if not
both of the read must be unaligned.

That's why I'm asking if we can assume alignment in any case at all. The
SVN changelog mentions some aligned memory allocation, but I have not
looked at what that actually was about.

-- 
Rémi Denis-Courmont


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