Hello Leah
I think I did it with -c option (i.e. cbmem -c)?!? Just to be sure I did it
once more and attach you the output.
Thx + greetings,
Marcel
On Sun, 31 Jul 2016 09:49:42 +0100
Leah Rowe <[email protected]> wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
>
> Can you try with the -c option?
>
> cbmem -c
>
> Also make sure to send replies to the mailing list, where we have peer
> review, otherwise I have to forward useful bits to the mailing list
> myself.
>
> Op 31/07/16 om 08:21 schreef Marcel Maci:
> > Hi Leah Thx again for your quick answer. Here I send you the output
> > of cbmem from my Thinkpad T400. Note that it's with the old version
> > of Libreboot (20150518), so I don't know if it's useful. I don't
> > have the ehci debug dongle - anyway, this is all quite new for me
> > (but I'll do what I can to provide information you need in order to
> > test new versions). Another question: which e-mail address should I
> > use when I reply? If I have enough time I will flash the
> > experimental version of libreboot on my Thinkpad x60 today and send
> > you the cbmem-logs. Thx + greetings, Marcel
> >
> >
> > coreboot-4.0 Mon May 18 03:42:26 UTC 2015 romstage starting...
> > running main(bist = 0) Hybrid graphics available, setting mode 0
> > Stepping B3 2 CPU cores AMT enabled capable of DDR2 of 800 MHz or
> > lower VT-d enabled GMCH: GM45 TXT enabled Render frequency: 533
> > MHz IGD enabled PCIe-to-GMCH enabled GMCH supports DDR3 with 1067
> > MT or less GMCH supports FSB with up to 1067 MHz SMBus controller
> > enabled. 0:50:b 2:51:b DDR mask 5, DDR 3 Bank 0 populated: Raw card
> > type: F Row addr bits: 14 Col addr bits: 10 byte width:
> > 1 page size: 1024 banks: 8 ranks: 2
> > tAAmin: 105 tCKmin: 15 Max clock: 533 MHz CAS: 0x01c0
> > Bank 1 populated: Raw card type: F Row addr bits: 14 Col addr
> > bits: 10 byte width: 1 page size: 1024 banks:
> > 8
> >
> >
> >> El 30 jul 2016, a las 2:11, Leah Rowe <[email protected]>
> >> escribió:
> >>
> > You can get them using cbmem -c
> >
> > cbmem is in lbireboot under coreboot/util in one of the coreboot
> > src directories. You might also be able to get the same logs from
> > serial device (ehci debug dongle) but I'm guessing you don't have
> > that?
> >
> > If you can't do these things, don't worry,it's not critical
> >
> > Op 29/07/16 om 13:59 schreef Marcel Maci:
> >>>>
> >>>> Hi Leah, Excuse my newbie question: what do you mean by
> >>>> coreboot logs? The file dmesg or any other file under
> >>>> /var/log? Metal chassis: of course, but note that I'm a
> >>>> complete amateur (so my soldering skills are not good ...)
> >>>> Marcel
> >>>>
> >>>> On Thu, 28 Jul 2016 23:13:12 +0100 Leah Rowe
> >>>> <[email protected]> wrote:
> >>>>
> >>>> Hi Marcel,
> >>>>
> >>>> Op 28/07/16 om 18:32 schreef Marcel Maci:
> >>>>>>>
> >>>>>>> Hi Leah
> >>>>>>>
> >>>>>>> Thx for your answer. I tried experimental_86_g07ed7f9
> >>>>>>> with my Thinkpad T400 today. Everything is running (I
> >>>>>>> can tell from the noise of the HDD and also indicator
> >>>>>>> of wifi comes up after blindly logging into the
> >>>>>>> system), but graphics fail completely: not even
> >>>>>>> external VGA-Monitor works and LCD-panel doesnt even
> >>>>>>> flicker. Sewed an opening in the metal chassis today,
> >>>>>>> so that I can access the flash chip more easily now
> >>>>>>> (see photo attached, I was really fed up with all
> >>>>>>> those screws, the heatsink and thermal paste ... :-),
> >>>>>>> so flashing and testing a new image is much more
> >>>>>>> straightforward now.
> >>>>>>>
> >>>>>>> As to the Thinkpad x60s: the improvements sound great,
> >>>>>>> but I will leave it as it is for the moment (I use it
> >>>>>>> as my main computer for office work at the moment, so
> >>>>>>> it has to work ... ;-), but I have another Thinkpad x60
> >>>>>>> (not the s model) which I can try instead.
> >>>>>>>
> >>>>>>> Let me know if you want me to test another release
> >>>>>>> candidate.
> >>>>>>>
> >>>>>>> Marcel
> >>>>
> >>>> Thank you for your report. If you also have coreboot logs,
> >>>> that would be great.
> >>>>
> >>>> It seems that upstream coreboot has a regression somewhere
> >>>> in native graphics initialization on the T400. Previous betas
> >>>> worked, before we updated the revision of coreboot used for
> >>>> your laptop. We'll have to revert back to the previous
> >>>> revision for now, and disable text mode on it, until this can
> >>>> be fixed. Other people also reported the same issue as you
> >>>> with the T400.
> >>>>
> >>>> We also need to do this for now on X200, because USB is
> >>>> broken for some reason in text mode on that system (unless
> >>>> it's fixed).
> >>>>
> >>>> By the way, what you've done to that metal chassis around the
> >>>> board is not good. That part of it is needed for structural
> >>>> integrity. If you want easier access to the chip, you could
> >>>> solder wires and route those instead. You've already done it
> >>>> now, so no point worrying.
> >>>>
> >
> >>
> >
>
> - --
> Leah Rowe
>
> Libreboot developer
>
> Use free software. Free as in freedom.
> https://www.gnu.org/philosophy/free-sw.html
>
> Use a free operating system, GNU/Linux.
> https://www.gnu.org/
>
> Use a free BIOS.
> https://libreboot.org/
>
> Support freedom. Join the Free Software Foundation.
> https://fsf.org/
>
> Minifree Ltd, trading as Ministry of Freedom | Registered in England,
> No. 9361826 | VAT No. GB202190462
> Registered Office: 19 Hilton Road, Canvey Island, Essex SS8 9QA, UK |
> Web: http://minifree.org/
>
> -----BEGIN PGP SIGNATURE-----
> Version: GnuPG v2.0.22 (GNU/Linux)
>
> iQEcBAEBAgAGBQJXnbumAAoJEP9Ft0z50c+UurQH/jbpGCdeRrpQ3E6VMIqIzvDb
> AqCVEa1LlWYoSwnQSJMrJNdMAcJqnx+IG6NdqCVsnlKNQOla5EnOHtlantJ/YBd7
> xXBxWtmwD7fLvypC0/iNbl1yfB0lo7wdshVYj5Y7GGrExWRuxgZzq/AYGPQu9Sw9
> H6+1495jfnG1wVfHwaNI4B+slScFHQ26zTLQV01SdMdz7mNUpLwwCkyp5ER3i265
> xAx8t3h2xaeV2sFfuR9KSCBTTFnQN/9uoLo6/yOvt08z6nXBkTcUT4M04+pOw0BU
> b03DETMlOZeoKj92FZ8esABb2yRLZW4l5SZoT/GqkqmEHYlIyVYsQYzpGU5CNYk=
> =VRX+
> -----END PGP SIGNATURE-----
--
Marcel Maci
Avenue du Guintzet 15
1700 Fribourg
079 772 50 30
[email protected]
www.liederlobby.ch
coreboot-4.0 Mon May 18 03:42:26 UTC 2015 romstage starting...
running main(bist = 0)
Hybrid graphics available, setting mode 0
Stepping B3
2 CPU cores
AMT enabled
capable of DDR2 of 800 MHz or lower
VT-d enabled
GMCH: GM45
TXT enabled
Render frequency: 533 MHz
IGD enabled
PCIe-to-GMCH enabled
GMCH supports DDR3 with 1067 MT or less
GMCH supports FSB with up to 1067 MHz
SMBus controller enabled.
0:50:b
2:51:b
DDR mask 5, DDR 3
Bank 0 populated:
Raw card type: F
Row addr bits: 14
Col addr bits: 10
byte width: 1
page size: 1024
banks: 8
ranks: 2
tAAmin: 105
tCKmin: 15
Max clock: 533 MHz
CAS: 0x01c0
Bank 1 populated:
Raw card type: F
Row addr bits: 14
Col addr bits: 10
byte width: 1
page size: 1024
banks: 8
ranks: 2
tAAmin: 105
tCKmin: 15
Max clock: 533 MHz
CAS: 0x01c0
Trying CAS 7, tCK 15.
Found compatible clock / CAS pair: 533 / 7.
Timing values:
tCLK: 15
tRAS: 20
tRP: 7
tRCD: 7
tRFC: 68
tWR: 8
tRD: 11
tRRD: 4
tFAW: 20
tWL: 6
Changing memory frequency: old 3, new 6.
Setting IGD memory frequencies for VCO #1.
Memory configured in dual-channel assymetric mode.
Memory map:
TOM = 512MB
TOLUD = 512MB
TOUUD = 512MB
REMAP: base = 65535MB
limit = 0MB
usedMEsize: 0MB
Performing Jedec initialization at address 0x00000000.
Performing Jedec initialization at address 0x08000000.
Performing Jedec initialization at address 0x10000000.
Performing Jedec initialization at address 0x18000000.
Final timings for group 0 on channel 0: 6.1.0.3.6
Final timings for group 1 on channel 0: 6.0.2.7.4
Final timings for group 2 on channel 0: 6.1.2.1.0
Final timings for group 3 on channel 0: 6.1.0.7.7
Final timings for group 0 on channel 1: 6.1.0.1.6
Final timings for group 1 on channel 1: 6.0.2.4.6
Final timings for group 2 on channel 1: 6.1.0.8.7
Final timings for group 3 on channel 1: 6.1.0.6.3
Lower bound for byte lane 0 on channel 0: 0.0
Upper bound for byte lane 0 on channel 0: 11.1
Final timings for byte lane 0 on channel 0: 5.4
Lower bound for byte lane 1 on channel 0: 0.0
Upper bound for byte lane 1 on channel 0: 9.6
Final timings for byte lane 1 on channel 0: 4.7
Lower bound for byte lane 2 on channel 0: 0.0
Upper bound for byte lane 2 on channel 0: 8.5
Final timings for byte lane 2 on channel 0: 4.2
Lower bound for byte lane 3 on channel 0: 0.0
Upper bound for byte lane 3 on channel 0: 10.2
Final timings for byte lane 3 on channel 0: 5.1
Lower bound for byte lane 4 on channel 0: 0.0
Upper bound for byte lane 4 on channel 0: 10.2
Final timings for byte lane 4 on channel 0: 5.1
Lower bound for byte lane 5 on channel 0: 0.0
Upper bound for byte lane 5 on channel 0: 9.1
Final timings for byte lane 5 on channel 0: 4.4
Lower bound for byte lane 6 on channel 0: 0.0
Upper bound for byte lane 6 on channel 0: 8.2
Final timings for byte lane 6 on channel 0: 4.1
Lower bound for byte
*** Log truncated, 2209 characters dropped. ***
exit main()
Trying CBFS ramstage loader.
CBFS: loading stage @ 0x100000 (227148 bytes), entry @ 0x100000
EHCI debug port found in CBMEM.
coreboot-4.0 Mon May 18 03:42:26 UTC 2015 ramstage starting...
Normal boot.
BS: Entering BS_PRE_DEVICE state.
CBMEM: recovering 5/254 entries from root @ bdbff000
Moving GDT to bdbdb000...ok
BS: Exiting BS_PRE_DEVICE state.
BS: Entering BS_DEV_INIT_CHIPS state.
Initializing i82801ix southbridge...
BS: Exiting BS_DEV_INIT_CHIPS state.
BS: Entering BS_DEV_ENUMERATE state.
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:03.1: enabled 0
PCI: 00:03.2: enabled 0
PCI: 00:03.3: enabled 0
IOAPIC: 02: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.7: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 1
PCI: 00:1d.2: enabled 1
PCI: 00:1d.7: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:03.1: enabled 0
PCI: 00:03.2: enabled 0
PCI: 00:03.3: enabled 0
IOAPIC: 02: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.7: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 1
PCI: 00:1d.2: enabled 1
PCI: 00:1d.7: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
scan_static_bus for Root Device
CPU_CLUSTER: 0 enabled
Normal boot.
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/2a40] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/2a42] enabled
PCI: 00:02.1 [8086/2a43] enabled
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
PCI: Static device PCI: 00:03.0 not found, disabling it.
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
PCI: 00:19.0 [8086/10f5] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1a.0 [8086/2937] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1a.1 [8086/2938] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1a.2 [8086/2939] enabled
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
PCI: 00:1a.7 [8086/0000] ops
PCI: 00:1a.7 [8086/293c] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1b.0 [8086/293e] ops
PCI: 00:1b.0 [8086/293e] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/2940] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/2942] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/2944] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/2946] enabled
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
PCI: 00:1d.0 [8086/2934] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1d.1 [8086/2935] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1d.2 [8086/2936] enabled
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
PCI: 00:1d.7 [8086/0000] ops
PCI: 00:1d.7 [8086/293a] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1e.0 [8086/0000] bus ops
PCI: 00:1e.0 [8086/2448] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/2917] enabled
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/2928] enabled
child IOAPIC: 02 not a PCI device
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/2930] enabled
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
child IOAPIC: 02 not a PCI device
PCI: Left over static devices:
IOAPIC: 02
PCI: Check your devicetree.cb.
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [168c/002b] enabled
PCI: pci_scan_bus returning with max=002
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x60
Capability: type 0x10 @ 0x40
do_pci_scan_bridge returns max 2
do_pci_scan_bridge for PCI: 00:1c.2
PCI: pci_scan_bus for bus 03
PCI: pci_scan_bus returning with max=003
do_pci_scan_bridge returns max 3
do_pci_scan_bridge for PCI: 00:1c.3
PCI: pci_scan_bus for bus 04
PCI: pci_scan_bus returning with max=004
do_pci_scan_bridge returns max 4
do_pci_scan_bridge for PCI: 00:1e.0
PCI: pci_scan_bus for bus 05
PCI: 05:00.0 [1180/0476] enabled
PCI: 05:00.1 [1180/0832] enabled
PCI: 05:00.2 [1180/0822] enabled
PCI: 05:00.3 [1180/0592] enabled
PCI: 05:00.4 [1180/0852] enabled
do_pci_scan_bridge for PCI: 05:00.0
PCI: pci_scan_bus for bus 06
PCI: pci_scan_bus returning with max=006
do_pci_scan_bridge returns max 6
PCI: pci_scan_bus returning with max=006
do_pci_scan_bridge returns max 6
scan_static_bus for PCI: 00:1f.0
PNP: 00ff.1 enabled
recv_ec_data: 0x37
recv_ec_data: 0x56
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x31
recv_ec_data: 0x36
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x07
recv_ec_data: 0x03
recv_ec_data: 0x60
recv_ec_data: 0x10
EC Firmware ID 7VHT16WW-3.7, Version 6.01A
recv_ec_data: 0x00
recv_ec_data: 0x10
recv_ec_data: 0x20
recv_ec_data: 0x30
recv_ec_data: 0x00
recv_ec_data: 0x00
recv_ec_data: 0xa6
recv_ec_data: 0x01
recv_ec_data: 0x70
dock is connected
recv_ec_data: 0xa0
PNP: 00ff.2 enabled
scan_static_bus for PCI: 00:1f.0 done
scan_static_bus for PCI: 00:1f.3
smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
scan_static_bus for PCI: 00:1f.3 done
PCI: pci_scan_bus returning with max=006
scan_static_bus for Root Device done
done
BS: Exiting BS_DEV_ENUMERATE state.
BS: Entering BS_DEV_RESOURCES state.
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
TOUUD 0x140000000 TOLUD 0xc0000000 TOM 0x100000000
IGD decoded, subtracting 32M UMA and 4M GTT
Available memory below 4GB: 3036M
Available memory above 4GB: 1024M
Adding UMA memory area base=0xbdc00000 size=0x2400000
Adding PCIe config bar base=0xf0000000 size=0x4000000
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:1a.7 EHCI BAR hook registered
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.2 read_resources bus 3 link: 0
PCI: 00:1c.2 read_resources bus 3 link: 0 done
PCI: 00:1c.3 read_resources bus 4 link: 0
PCI: 00:1c.3 read_resources bus 4 link: 0 done
More than one caller of pci_ehci_read_resources from PCI: 00:1d.7
PCI: 00:1e.0 read_resources bus 5 link: 0
PCI: 05:00.0 read_resources bus 6 link: 0
PCI: 05:00.0 read_resources bus 6 link: 0 done
PCI: 00:1e.0 read_resources bus 5 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PNP: 00ff.2 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI: 00:1f.3 read_resources bus 1 link: 0
PCI: 00:1f.3 read_resources bus 1 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100
index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags
40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200
index 3
DOMAIN: 0000 resource base c0000 size bdb40000 align 0 gran 0 limit 0 flags
e0004200 index 4
DOMAIN: 0000 resource base 100000000 size 40000000 align 0 gran 0 limit 0
flags e0004200 index 5
DOMAIN: 0000 resource base bdc00000 size 2400000 align 0 gran 0 limit 0 flags
f0000200 index 6
DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags
f0000200 index 7
PCI: 00:00.0
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit
ffffffffffffffff flags 201 index 10
PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit
ffffffffffffffff flags 1201 index 18
PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100
index 20
PCI: 00:02.1
PCI: 00:02.1 resource base 0 size 100000 align 20 gran 20 limit
ffffffffffffffff flags 201 index 10
PCI: 00:03.0
PCI: 00:03.1
PCI: 00:03.2
PCI: 00:03.3
PCI: 00:19.0
PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff
flags 200 index 10
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags
200 index 14
PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1a.1
PCI: 00:1a.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1a.2
PCI: 00:1a.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1a.7
PCI: 00:1a.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags
200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit
ffffffffffffffff flags 201 index 10
PCI: 00:1c.0
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102
index 1c
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff
flags 81202 index 24
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags
80202 index 20
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102
index 1c
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff
flags 81202 index 24
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags
80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit
ffffffffffffffff flags 201 index 10
PCI: 00:1c.2
PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102
index 1c
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff
flags 81202 index 24
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags
80202 index 20
PCI: 00:1c.3Unknown device path type: 0
child on link 0
PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102
index 1c
PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff
flags 81202 index 24
PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags
80202 index 20
Unknown device path type: 0
Unknown device path type: 0
resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200
index 10
Unknown device path type: 0
resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200
index 14
Unknown device path type: 0
resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1d.0
PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1d.1
PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1d.2
PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1d.7
PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags
200 index 10
PCI: 00:1e.0 child on link 0 PCI: 05:00.0
PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102
index 1c
PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff
flags 81202 index 24
PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags
80202 index 20
PCI: 05:00.0
PCI: 05:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff
flags 200 index 10
PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffffffff flags
100 index 2c
PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffffffff flags
100 index 34
PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff
flags 1200 index 1c
PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff
flags 200 index 24
PCI: 05:00.1
PCI: 05:00.1 resource base 0 size 800 align 11 gran 11 limit ffffffff flags
200 index 10
PCI: 05:00.2
PCI: 05:00.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags
200 index 10
PCI: 05:00.3
PCI: 05:00.3 resource base 0 size 100 align 8 gran 8 limit ffffffff flags
200 index 10
PCI: 05:00.4
PCI: 05:00.4 resource base 0 size 100 align 8 gran 8 limit ffffffff flags
200 index 10
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100
index 10000000
PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags
c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags
c0000200 index 3
PNP: 00ff.1
PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags
80000100 index 77
PNP: 00ff.2
PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100
index 60
PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100
index 62
PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100
index 64
PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100
index 66
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100
index 10
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100
index 14
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100
index 18
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100
index 1c
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags
200 index 24
PCI: 00:1f.3 child on link 0 I2C: 01:54
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags
f0000100 index 20
PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff
flags 201 index 10
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:5c
I2C: 01:5d
I2C: 01:5e
I2C: 01:5f
PCI: 00:1f.5
PCI: 00:1f.6
DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff
PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff done
PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff
PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff done
PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff
PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff done
PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff
Unknown device path type: 0
18 * [0x0 - 0xfff] io
PCI: 00:1c.3 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 12
limit: ffff done
PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff
PCI: 05:00.0 2c * [0x0 - 0xfff] io
PCI: 05:00.0 34 * [0x1000 - 0x1fff] io
PCI: 00:1e.0 compute_resources_io: base: 2000 size: 2000 align: 12 gran: 12
limit: ffff done
PCI: 00:1e.0 1c * [0x0 - 0x1fff] io
PCI: 00:1c.3 1c * [0x2000 - 0x2fff] io
PCI: 00:19.0 18 * [0x3000 - 0x301f] io
PCI: 00:1a.0 20 * [0x3020 - 0x303f] io
PCI: 00:1a.1 20 * [0x3040 - 0x305f] io
PCI: 00:1a.2 20 * [0x3060 - 0x307f] io
PCI: 00:1d.0 20 * [0x3080 - 0x309f] io
PCI: 00:1d.1 20 * [0x30a0 - 0x30bf] io
PCI: 00:1d.2 20 * [0x30c0 - 0x30df] io
PCI: 00:1f.2 20 * [0x30e0 - 0x30ff] io
PCI: 00:02.0 20 * [0x3400 - 0x3407] io
PCI: 00:1f.2 10 * [0x3408 - 0x340f] io
PCI: 00:1f.2 18 * [0x3410 - 0x3417] io
PCI: 00:1f.2 14 * [0x3418 - 0x341b] io
PCI: 00:1f.2 1c * [0x341c - 0x341f] io
DOMAIN: 0000 compute_resources_io: base: 3420 size: 3420 align: 12 gran: 0
limit: ffff done
DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit:
ffffffff
PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff
PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff done
PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit:
ffffffff
PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit:
ffffffff done
PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff
PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff done
PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit:
ffffffff
PCI: 02:00.0 10 * [0x0 - 0xffff] mem
PCI: 00:1c.1 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20
limit: ffffffff done
PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff
PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff done
PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit:
ffffffff
PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit:
ffffffff done
PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff
Unknown device path type: 0
14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.3 compute_resources_prefmem: base: 800000 size: 800000 align: 22
gran: 20 limit: ffffffff done
PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit:
ffffffff
Unknown device path type: 0
10 * [0x0 - 0x7fffff] mem
PCI: 00:1c.3 compute_resources_mem: base: 800000 size: 800000 align: 22 gran:
20 limit: ffffffff done
PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff
PCI: 05:00.0 1c * [0x0 - 0x1ffffff] prefmem
PCI: 00:1e.0 compute_resources_prefmem: base: 2000000 size: 2000000 align: 20
gran: 20 limit: ffffffff done
PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit:
ffffffff
PCI: 05:00.0 24 * [0x0 - 0x1ffffff] mem
PCI: 05:00.0 10 * [0x2000000 - 0x2000fff] mem
PCI: 05:00.1 10 * [0x2001000 - 0x20017ff] mem
PCI: 05:00.2 10 * [0x2001800 - 0x20018ff] mem
PCI: 05:00.3 10 * [0x2001900 - 0x20019ff] mem
PCI: 05:00.4 10 * [0x2001a00 - 0x2001aff] mem
PCI: 00:1e.0 compute_resources_mem: base: 2001b00 size: 2100000 align: 20 gran:
20 limit: ffffffff done
PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
PCI: 00:1c.3 24 * [0x10000000 - 0x107fffff] prefmem
PCI: 00:1c.3 20 * [0x10800000 - 0x10ffffff] mem
PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem
PCI: 00:1e.0 20 * [0x11400000 - 0x134fffff] mem
PCI: 00:1e.0 24 * [0x13500000 - 0x154fffff] prefmem
PCI: 00:02.1 10 * [0x15500000 - 0x155fffff] mem
PCI: 00:1c.1 20 * [0x15600000 - 0x156fffff] mem
PCI: 00:19.0 10 * [0x15700000 - 0x1571ffff] mem
PCI: 00:1b.0 10 * [0x15720000 - 0x15723fff] mem
PCI: 00:19.0 14 * [0x15724000 - 0x15724fff] mem
PCI: 00:1f.2 24 * [0x15725000 - 0x157257ff] mem
PCI: 00:1a.7 10 * [0x15725800 - 0x15725bff] mem
PCI: 00:1d.7 10 * [0x15725c00 - 0x15725fff] mem
PCI: 00:1f.3 10 * [0x15726000 - 0x157260ff] mem
DOMAIN: 0000 compute_resources_mem: base: 15726100 size: 15726100 align: 28
gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:02.0
constrain_resources: PCI: 00:02.1
constrain_resources: PCI: 00:19.0
constrain_resources: PCI: 00:1a.0
constrain_resources: PCI: 00:1a.1
constrain_resources: PCI: 00:1a.2
constrain_resources: PCI: 00:1a.7
constrain_resources: PCI: 00:1b.0
constrain_resources: PCI: 00:1c.0
constrain_resources: PCI: 00:1c.1
constrain_resources: PCI: 02:00.0
constrain_resources: PCI: 00:1c.2
constrain_resources: PCI: 00:1c.3
Unknown device path type: 0
constrain_resources:
constrain_resources: PCI: 00:1d.0
constrain_resources: PCI: 00:1d.1
constrain_resources: PCI: 00:1d.2
constrain_resources: PCI: 00:1d.7
constrain_resources: PCI: 00:1e.0
constrain_resources: PCI: 05:00.0
constrain_resources: PCI: 05:00.1
constrain_resources: PCI: 05:00.2
constrain_resources: PCI: 05:00.3
constrain_resources: PCI: 05:00.4
constrain_resources: PCI: 00:1f.0
constrain_resources: PNP: 00ff.1
constrain_resources: PNP: 00ff.2
skipping PNP: 00ff.2@60 fixed resource, size=0!
skipping PNP: 00ff.2@62 fixed resource, size=0!
skipping PNP: 00ff.2@64 fixed resource, size=0!
skipping PNP: 00ff.2@66 fixed resource, size=0!
constrain_resources: PCI: 00:1f.2
constrain_resources: PCI: 00:1f.3
constrain_resources: I2C: 01:54
constrain_resources: I2C: 01:55
constrain_resources: I2C: 01:56
constrain_resources: I2C: 01:57
constrain_resources: I2C: 01:5c
constrain_resources: I2C: 01:5d
constrain_resources: I2C: 01:5e
constrain_resources: I2C: 01:5f
avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
lim->base 000015f0 lim->limit 0000ffff
avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
lim->base c0000000 lim->limit efffffff
Setting resources...
DOMAIN: 0000 allocate_resources_io: base:15f0 size:3420 align:12 gran:0
limit:ffff
Assigned: PCI: 00:1e.0 1c * [0x2000 - 0x3fff] io
Assigned: PCI: 00:1c.3 1c * [0x4000 - 0x4fff] io
Assigned: PCI: 00:19.0 18 * [0x5000 - 0x501f] io
Assigned: PCI: 00:1a.0 20 * [0x5020 - 0x503f] io
Assigned: PCI: 00:1a.1 20 * [0x5040 - 0x505f] io
Assigned: PCI: 00:1a.2 20 * [0x5060 - 0x507f] io
Assigned: PCI: 00:1d.0 20 * [0x5080 - 0x509f] io
Assigned: PCI: 00:1d.1 20 * [0x50a0 - 0x50bf] io
Assigned: PCI: 00:1d.2 20 * [0x50c0 - 0x50df] io
Assigned: PCI: 00:1f.2 20 * [0x50e0 - 0x50ff] io
Assigned: PCI: 00:02.0 20 * [0x5400 - 0x5407] io
Assigned: PCI: 00:1f.2 10 * [0x5408 - 0x540f] io
Assigned: PCI: 00:1f.2 18 * [0x5410 - 0x5417] io
Assigned: PCI: 00:1f.2 14 * [0x5418 - 0x541b] io
Assigned: PCI: 00:1f.2 1c * [0x541c - 0x541f] io
DOMAIN: 0000 allocate_resources_io: next_base: 5420 size: 3420 align: 12 gran:
0 done
PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12
done
PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12
done
PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12
done
PCI: 00:1c.3 allocate_resources_io: base:4000 size:1000 align:12 gran:12
limit:ffff
Unknown device path type: 0
Assigned: 18 * [0x4000 - 0x4fff] io
PCI: 00:1c.3 allocate_resources_io: next_base: 5000 size: 1000 align: 12 gran:
12 done
PCI: 00:1e.0 allocate_resources_io: base:2000 size:2000 align:12 gran:12
limit:ffff
Assigned: PCI: 05:00.0 2c * [0x2000 - 0x2fff] io
Assigned: PCI: 05:00.0 34 * [0x3000 - 0x3fff] io
PCI: 00:1e.0 allocate_resources_io: next_base: 4000 size: 2000 align: 12 gran:
12 done
DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:15726100 align:28
gran:0 limit:efffffff
Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
Assigned: PCI: 00:1c.3 24 * [0xe0000000 - 0xe07fffff] prefmem
Assigned: PCI: 00:1c.3 20 * [0xe0800000 - 0xe0ffffff] mem
Assigned: PCI: 00:02.0 10 * [0xe1000000 - 0xe13fffff] mem
Assigned: PCI: 00:1e.0 20 * [0xe1400000 - 0xe34fffff] mem
Assigned: PCI: 00:1e.0 24 * [0xe3500000 - 0xe54fffff] prefmem
Assigned: PCI: 00:02.1 10 * [0xe5500000 - 0xe55fffff] mem
Assigned: PCI: 00:1c.1 20 * [0xe5600000 - 0xe56fffff] mem
Assigned: PCI: 00:19.0 10 * [0xe5700000 - 0xe571ffff] mem
Assigned: PCI: 00:1b.0 10 * [0xe5720000 - 0xe5723fff] mem
Assigned: PCI: 00:19.0 14 * [0xe5724000 - 0xe5724fff] mem
Assigned: PCI: 00:1f.2 24 * [0xe5725000 - 0xe57257ff] mem
Assigned: PCI: 00:1a.7 10 * [0xe5725800 - 0xe5725bff] mem
Assigned: PCI: 00:1d.7 10 * [0xe5725c00 - 0xe5725fff] mem
Assigned: PCI: 00:1f.3 10 * [0xe5726000 - 0xe57260ff] mem
DOMAIN: 0000 allocate_resources_mem: next_base: e5726100 size: 15726100 align:
28 gran: 0 done
PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20
limit:efffffff
PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20
gran: 20 done
PCI: 00:1c.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20
limit:efffffff
PCI: 00:1c.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20
gran: 20 done
PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20
limit:efffffff
PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20
gran: 20 done
PCI: 00:1c.1 allocate_resources_mem: base:e5600000 size:100000 align:20 gran:20
limit:efffffff
Assigned: PCI: 02:00.0 10 * [0xe5600000 - 0xe560ffff] mem
PCI: 00:1c.1 allocate_resources_mem: next_base: e5610000 size: 100000 align: 20
gran: 20 done
PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20
limit:efffffff
PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20
gran: 20 done
PCI: 00:1c.2 allocate_resources_mem: base:efffffff size:0 align:20 gran:20
limit:efffffff
PCI: 00:1c.2 allocate_resources_mem: next_base: efffffff size: 0 align: 20
gran: 20 done
PCI: 00:1c.3 allocate_resources_prefmem: base:e0000000 size:800000 align:22
gran:20 limit:efffffff
Unknown device path type: 0
Assigned: 14 * [0xe0000000 - 0xe07fffff] prefmem
PCI: 00:1c.3 allocate_resources_prefmem: next_base: e0800000 size: 800000
align: 22 gran: 20 done
PCI: 00:1c.3 allocate_resources_mem: base:e0800000 size:800000 align:22 gran:20
limit:efffffff
Unknown device path type: 0
Assigned: 10 * [0xe0800000 - 0xe0ffffff] mem
PCI: 00:1c.3 allocate_resources_mem: next_base: e1000000 size: 800000 align: 22
gran: 20 done
PCI: 00:1e.0 allocate_resources_prefmem: base:e3500000 size:2000000 align:20
gran:20 limit:efffffff
Assigned: PCI: 05:00.0 1c * [0xe3500000 - 0xe54fffff] prefmem
PCI: 00:1e.0 allocate_resources_prefmem: next_base: e5500000 size: 2000000
align: 20 gran: 20 done
PCI: 00:1e.0 allocate_resources_mem: base:e1400000 size:2100000 align:20
gran:20 limit:efffffff
Assigned: PCI: 05:00.0 24 * [0xe1400000 - 0xe33fffff] mem
Assigned: PCI: 05:00.0 10 * [0xe3400000 - 0xe3400fff] mem
Assigned: PCI: 05:00.1 10 * [0xe3401000 - 0xe34017ff] mem
Assigned: PCI: 05:00.2 10 * [0xe3401800 - 0xe34018ff] mem
Assigned: PCI: 05:00.3 10 * [0xe3401900 - 0xe34019ff] mem
Assigned: PCI: 05:00.4 10 * [0xe3401a00 - 0xe3401aff] mem
PCI: 00:1e.0 allocate_resources_mem: next_base: e3401b00 size: 2100000 align:
20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem
DOMAIN: 0000 04 <- [0x00000c0000 - 0x00bdbfffff] size 0xbdb40000 gran 0x00 mem
DOMAIN: 0000 05 <- [0x0100000000 - 0x013fffffff] size 0x40000000 gran 0x00 mem
DOMAIN: 0000 06 <- [0x00bdc00000 - 0x00bfffffff] size 0x02400000 gran 0x00 mem
DOMAIN: 0000 07 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00e1000000 - 0x00e13fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c
prefmem64
PCI: 00:02.0 20 <- [0x0000005400 - 0x0000005407] size 0x00000008 gran 0x03 io
PCI: 00:02.1 10 <- [0x00e5500000 - 0x00e55fffff] size 0x00100000 gran 0x14 mem64
PCI: 00:19.0 10 <- [0x00e5700000 - 0x00e571ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00e5724000 - 0x00e5724fff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000005000 - 0x000000501f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 20 <- [0x0000005020 - 0x000000503f] size 0x00000020 gran 0x05 io
PCI: 00:1a.1 20 <- [0x0000005040 - 0x000000505f] size 0x00000020 gran 0x05 io
PCI: 00:1a.2 20 <- [0x0000005060 - 0x000000507f] size 0x00000020 gran 0x05 io
PCI: 00:1a.7 EHCI Debug Port hook triggered
PCI: 00:1a.7 10 <- [0x00e5725800 - 0x00e5725bff] size 0x00000400 gran 0x0a mem
PCI: 00:1a.7 10 <- [0x00e5725800 - 0x00e5725bff] size 0x00000400 gran 0x0a mem
PCI: 00:1a.7 EHCI Debug Port relocated
PCI: 00:1b.0 10 <- [0x00e5720000 - 0x00e5723fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus
01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus
01 prefmem
PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus
01 mem
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus
02 io
PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus
02 prefmem
PCI: 00:1c.1 20 <- [0x00e5600000 - 0x00e56fffff] size 0x00100000 gran 0x14 bus
02 mem
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00e5600000 - 0x00e560ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus
03 io
PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus
03 prefmem
PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus
03 mem
PCI: 00:1c.3 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus
04 io
PCI: 00:1c.3 24 <- [0x00e0000000 - 0x00e07fffff] size 0x00800000 gran 0x14 bus
04 prefmem
PCI: 00:1c.3 20 <- [0x00e0800000 - 0x00e0ffffff] size 0x00800000 gran 0x14 bus
04 mem
PCI: 00:1c.3 assign_resources, bus 4 link: 0
Unknown device path type: 0
missing set_resources
PCI: 00:1c.3 assign_resources, bus 4 link: 0
PCI: 00:1d.0 20 <- [0x0000005080 - 0x000000509f] size 0x00000020 gran 0x05 io
PCI: 00:1d.1 20 <- [0x00000050a0 - 0x00000050bf] size 0x00000020 gran 0x05 io
PCI: 00:1d.2 20 <- [0x00000050c0 - 0x00000050df] size 0x00000020 gran 0x05 io
PCI: 00:1d.7 10 <- [0x00e5725c00 - 0x00e5725fff] size 0x00000400 gran 0x0a mem
PCI: 00:1e.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus
05 io
PCI: 00:1e.0 24 <- [0x00e3500000 - 0x00e54fffff] size 0x02000000 gran 0x14 bus
05 prefmem
PCI: 00:1e.0 20 <- [0x00e1400000 - 0x00e34fffff] size 0x02100000 gran 0x14 bus
05 mem
PCI: 00:1e.0 assign_resources, bus 5 link: 0
PCI: 05:00.0 10 <- [0x00e3400000 - 0x00e3400fff] size 0x00001000 gran 0x0c mem
PCI: 05:00.0 2c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x02 io
PCI: 05:00.0 34 <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x02 io
PCI: 05:00.0 1c <- [0x00e3500000 - 0x00e54fffff] size 0x02000000 gran 0x0c
prefmem
PCI: 05:00.0 24 <- [0x00e1400000 - 0x00e33fffff] size 0x02000000 gran 0x0c mem
PCI: 05:00.1 10 <- [0x00e3401000 - 0x00e34017ff] size 0x00000800 gran 0x0b mem
PCI: 05:00.2 10 <- [0x00e3401800 - 0x00e34018ff] size 0x00000100 gran 0x08 mem
PCI: 05:00.3 10 <- [0x00e3401900 - 0x00e34019ff] size 0x00000100 gran 0x08 mem
PCI: 05:00.4 10 <- [0x00e3401a00 - 0x00e3401aff] size 0x00000100 gran 0x08 mem
PCI: 00:1e.0 assign_resources, bus 5 link: 0
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000005408 - 0x000000540f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000005418 - 0x000000541b] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000005410 - 0x0000005417] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x000000541c - 0x000000541f] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x00000050e0 - 0x00000050ff] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e5725000 - 0x00e57257ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00e5726000 - 0x00e57260ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.3 assign_resources, bus 1 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 15f0 size 3420 align 12 gran 0 limit ffff flags
40040100 index 10000000
DOMAIN: 0000 resource base d0000000 size 15726100 align 28 gran 0 limit
efffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200
index 3
DOMAIN: 0000 resource base c0000 size bdb40000 align 0 gran 0 limit 0 flags
e0004200 index 4
DOMAIN: 0000 resource base 100000000 size 40000000 align 0 gran 0 limit 0
flags e0004200 index 5
DOMAIN: 0000 resource base bdc00000 size 2400000 align 0 gran 0 limit 0 flags
f0000200 index 6
DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags
f0000200 index 7
PCI: 00:00.0
PCI: 00:02.0
PCI: 00:02.0 resource base e1000000 size 400000 align 22 gran 22 limit
efffffff flags 60000201 index 10
PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit
efffffff flags 60001201 index 18
PCI: 00:02.0 resource base 5400 size 8 align 3 gran 3 limit ffff flags
60000100 index 20
PCI: 00:02.1
PCI: 00:02.1 resource base e5500000 size 100000 align 20 gran 20 limit
efffffff flags 60000201 index 10
PCI: 00:03.0
PCI: 00:03.1
PCI: 00:03.2
PCI: 00:03.3
PCI: 00:19.0
PCI: 00:19.0 resource base e5700000 size 20000 align 17 gran 17 limit
efffffff flags 60000200 index 10
PCI: 00:19.0 resource base e5724000 size 1000 align 12 gran 12 limit
efffffff flags 60000200 index 14
PCI: 00:19.0 resource base 5000 size 20 align 5 gran 5 limit ffff flags
60000100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base 5020 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1a.1
PCI: 00:1a.1 resource base 5040 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1a.2
PCI: 00:1a.2 resource base 5060 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1a.7
PCI: 00:1a.7 resource base e5725800 size 400 align 10 gran 10 limit efffffff
flags 60000200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base e5720000 size 4000 align 14 gran 14 limit
efffffff flags 60000201 index 10
PCI: 00:1c.0
PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags
60080102 index 1c
PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff
flags 60081202 index 24
PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff
flags 60080202 index 20
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags
60080102 index 1c
PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff
flags 60081202 index 24
PCI: 00:1c.1 resource base e5600000 size 100000 align 20 gran 20 limit
efffffff flags 60080202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base e5600000 size 10000 align 16 gran 16 limit
efffffff flags 60000201 index 10
PCI: 00:1c.2
PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags
60080102 index 1c
PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff
flags 60081202 index 24
PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff
flags 60080202 index 20
PCI: 00:1c.3Unknown device path type: 0
child on link 0
PCI: 00:1c.3 resource base 4000 size 1000 align 12 gran 12 limit ffff flags
60080102 index 1c
PCI: 00:1c.3 resource base e0000000 size 800000 align 22 gran 20 limit
efffffff flags 60081202 index 24
PCI: 00:1c.3 resource base e0800000 size 800000 align 22 gran 20 limit
efffffff flags 60080202 index 20
Unknown device path type: 0
Unknown device path type: 0
resource base e0800000 size 800000 align 22 gran 22 limit efffffff flags
40000200 index 10
Unknown device path type: 0
resource base e0000000 size 800000 align 22 gran 22 limit efffffff flags
40001200 index 14
Unknown device path type: 0
resource base 4000 size 1000 align 12 gran 12 limit ffff flags 40000100
index 18
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1d.0
PCI: 00:1d.0 resource base 5080 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1d.1
PCI: 00:1d.1 resource base 50a0 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1d.2
PCI: 00:1d.2 resource base 50c0 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1d.7
PCI: 00:1d.7 resource base e5725c00 size 400 align 10 gran 10 limit efffffff
flags 60000200 index 10
PCI: 00:1e.0 child on link 0 PCI: 05:00.0
PCI: 00:1e.0 resource base 2000 size 2000 align 12 gran 12 limit ffff flags
60080102 index 1c
PCI: 00:1e.0 resource base e3500000 size 2000000 align 20 gran 20 limit
efffffff flags 60081202 index 24
PCI: 00:1e.0 resource base e1400000 size 2100000 align 20 gran 20 limit
efffffff flags 60080202 index 20
PCI: 05:00.0
PCI: 05:00.0 resource base e3400000 size 1000 align 12 gran 12 limit
efffffff flags 60000200 index 10
PCI: 05:00.0 resource base 2000 size 1000 align 2 gran 2 limit ffff flags
60000100 index 2c
PCI: 05:00.0 resource base 3000 size 1000 align 2 gran 2 limit ffff flags
60000100 index 34
PCI: 05:00.0 resource base e3500000 size 2000000 align 12 gran 12 limit
efffffff flags 60001200 index 1c
PCI: 05:00.0 resource base e1400000 size 2000000 align 12 gran 12 limit
efffffff flags 60000200 index 24
PCI: 05:00.1
PCI: 05:00.1 resource base e3401000 size 800 align 11 gran 11 limit
efffffff flags 60000200 index 10
PCI: 05:00.2
PCI: 05:00.2 resource base e3401800 size 100 align 8 gran 8 limit efffffff
flags 60000200 index 10
PCI: 05:00.3
PCI: 05:00.3 resource base e3401900 size 100 align 8 gran 8 limit efffffff
flags 60000200 index 10
PCI: 05:00.4
PCI: 05:00.4 resource base e3401a00 size 100 align 8 gran 8 limit efffffff
flags 60000200 index 10
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100
index 10000000
PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags
c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags
c0000200 index 3
PNP: 00ff.1
PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags
80000100 index 77
PNP: 00ff.2
PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100
index 60
PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100
index 62
PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100
index 64
PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100
index 66
PCI: 00:1f.2
PCI: 00:1f.2 resource base 5408 size 8 align 3 gran 3 limit ffff flags
60000100 index 10
PCI: 00:1f.2 resource base 5418 size 4 align 2 gran 2 limit ffff flags
60000100 index 14
PCI: 00:1f.2 resource base 5410 size 8 align 3 gran 3 limit ffff flags
60000100 index 18
PCI: 00:1f.2 resource base 541c size 4 align 2 gran 2 limit ffff flags
60000100 index 1c
PCI: 00:1f.2 resource base 50e0 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1f.2 resource base e5725000 size 800 align 11 gran 11 limit efffffff
flags 60000200 index 24
PCI: 00:1f.3 child on link 0 I2C: 01:54
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags
f0000100 index 20
PCI: 00:1f.3 resource base e5726000 size 100 align 8 gran 8 limit efffffff
flags 60000201 index 10
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:5c
I2C: 01:5d
I2C: 01:5e
I2C: 01:5f
PCI: 00:1f.5
PCI: 00:1f.6
Done allocating resources.
BS: Exiting BS_DEV_RESOURCES state.
BS: Entering BS_DEV_ENABLE state.
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/20e0
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 17aa/20e4
PCI: 00:02.0 cmd <- 03
PCI: 00:02.1 subsystem <- 17aa/20e4
PCI: 00:02.1 cmd <- 02
PCI: 00:19.0 subsystem <- 0000/0000
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 17aa/20f0
PCI: 00:1a.0 cmd <- 01
PCI: 00:1a.1 subsystem <- 17aa/20f0
PCI: 00:1a.1 cmd <- 01
PCI: 00:1a.2 subsystem <- 17aa/20f0
PCI: 00:1a.2 cmd <- 01
PCI: 00:1a.7 subsystem <- 17aa/20f1
PCI: 00:1a.7 cmd <- 102
PCI: 00:1b.0 subsystem <- 17aa/20f2
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 17aa/20f3
PCI: 00:1c.0 cmd <- 100
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 17aa/20f3
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 17aa/20f3
PCI: 00:1c.2 cmd <- 100
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 17aa/20f3
PCI: 00:1c.3 cmd <- 107
PCI: 00:1d.0 subsystem <- 17aa/20f0
PCI: 00:1d.0 cmd <- 01
PCI: 00:1d.1 subsystem <- 17aa/20f0
PCI: 00:1d.1 cmd <- 01
PCI: 00:1d.2 subsystem <- 17aa/20f0
PCI: 00:1d.2 cmd <- 01
PCI: 00:1d.7 subsystem <- 17aa/20f1
PCI: 00:1d.7 cmd <- 102
PCI: 00:1e.0 bridge ctrl <- 0003
PCI: 00:1e.0 subsystem <- 17aa/20f4
PCI: 00:1e.0 cmd <- 107
PCI: 00:1f.0 subsystem <- 17aa/20f5
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/20f8
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/20f9
PCI: 00:1f.3 cmd <- 103
PCI: 02:00.0 cmd <- 02
PCI: 05:00.0 bridge ctrl <- 0503
PCI: 05:00.0 cmd <- 03
PCI: 05:00.1 cmd <- 02
PCI: 05:00.2 cmd <- 06
PCI: 05:00.3 cmd <- 06
PCI: 05:00.4 cmd <- 06
done.
BS: Exiting BS_DEV_ENABLE state.
BS: Entering BS_DEV_INIT state.
Initializing devices...
Root Device init
Keyboard init...
No PS/2 keyboard detected.
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
Initializing SMM handler... ... pmbase = 0x0600
SMI_STS: MCSMI PM1
PM1_STS: WAK PWRBTN
GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO5 GPIO2 GPIO1 GPIO0
ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI5 GPI2 GPI1 GPI0
TCO_STS:
... raise SMI#
Initializing CPU #0
CPU: vendor Intel device 1067a
CPU: family 06, model 17, stepping 0a
Enabling cache
CBFS: WARNING: 'cpu_microcode_blob.bin' not found.
CPU: Intel(R) Core(TM)2 CPU T9550 @ 2.66GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000bdc00000 size 0xbdb40000 type 6
0x00000000bdc00000 - 0x00000000d0000000 size 0x12400000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
0x0000000100000000 - 0x0000000140000000 size 0x40000000 type 6
MTRR addr 0x0-0x10 set to 6 type @ 0
MTRR addr 0x10-0x20 set to 6 type @ 1
MTRR addr 0x20-0x30 set to 6 type @ 2
MTRR addr 0x30-0x40 set to 6 type @ 3
MTRR addr 0x40-0x50 set to 6 type @ 4
MTRR addr 0x50-0x60 set to 6 type @ 5
MTRR addr 0x60-0x70 set to 6 type @ 6
MTRR addr 0x70-0x80 set to 6 type @ 7
MTRR addr 0x80-0x84 set to 6 type @ 8
MTRR addr 0x84-0x88 set to 6 type @ 9
MTRR addr 0x88-0x8c set to 6 type @ 10
MTRR addr 0x8c-0x90 set to 6 type @ 11
MTRR addr 0x90-0x94 set to 6 type @ 12
MTRR addr 0x94-0x98 set to 6 type @ 13
MTRR addr 0x98-0x9c set to 6 type @ 14
MTRR addr 0x9c-0xa0 set to 6 type @ 15
MTRR addr 0xa0-0xa4 set to 0 type @ 16
MTRR addr 0xa4-0xa8 set to 0 type @ 17
MTRR addr 0xa8-0xac set to 0 type @ 18
MTRR addr 0xac-0xb0 set to 0 type @ 19
MTRR addr 0xb0-0xb4 set to 0 type @ 20
MTRR addr 0xb4-0xb8 set to 0 type @ 21
MTRR addr 0xb8-0xbc set to 0 type @ 22
MTRR addr 0xbc-0xc0 set to 0 type @ 23
MTRR addr 0xc0-0xc1 set to 6 type @ 24
MTRR addr 0xc1-0xc2 set to 6 type @ 25
MTRR addr 0xc2-0xc3 set to 6 type @ 26
MTRR addr 0xc3-0xc4 set to 6 type @ 27
MTRR addr 0xc4-0xc5 set to 6 type @ 28
MTRR addr 0xc5-0xc6 set to 6 type @ 29
MTRR addr 0xc6-0xc7 set to 6 type @ 30
MTRR addr 0xc7-0xc8 set to 6 type @ 31
MTRR addr 0xc8-0xc9 set to 6 type @ 32
MTRR addr 0xc9-0xca set to 6 type @ 33
MTRR addr 0xca-0xcb set to 6 type @ 34
MTRR addr 0xcb-0xcc set to 6 type @ 35
MTRR addr 0xcc-0xcd set to 6 type @ 36
MTRR addr 0xcd-0xce set to 6 type @ 37
MTRR addr 0xce-0xcf set to 6 type @ 38
MTRR addr 0xcf-0xd0 set to 6 type @ 39
MTRR addr 0xd0-0xd1 set to 6 type @ 40
MTRR addr 0xd1-0xd2 set to 6 type @ 41
MTRR addr 0xd2-0xd3 set to 6 type @ 42
MTRR addr 0xd3-0xd4 set to 6 type @ 43
MTRR addr 0xd4-0xd5 set to 6 type @ 44
MTRR addr 0xd5-0xd6 set to 6 type @ 45
MTRR addr 0xd6-0xd7 set to 6 type @ 46
MTRR addr 0xd7-0xd8 set to 6 type @ 47
MTRR addr 0xd8-0xd9 set to 6 type @ 48
MTRR addr 0xd9-0xda set to 6 type @ 49
MTRR addr 0xda-0xdb set to 6 type @ 50
MTRR addr 0xdb-0xdc set to 6 type @ 51
MTRR addr 0xdc-0xdd set to 6 type @ 52
MTRR addr 0xdd-0xde set to 6 type @ 53
MTRR addr 0xde-0xdf set to 6 type @ 54
MTRR addr 0xdf-0xe0 set to 6 type @ 55
MTRR addr 0xe0-0xe1 set to 6 type @ 56
MTRR addr 0xe1-0xe2 set to 6 type @ 57
MTRR addr 0xe2-0xe3 set to 6 type @ 58
MTRR addr 0xe3-0xe4 set to 6 type @ 59
MTRR addr 0xe4-0xe5 set to 6 type @ 60
MTRR addr 0xe5-0xe6 set to 6 type @ 61
MTRR addr 0xe6-0xe7 set to 6 type @ 62
MTRR addr 0xe7-0xe8 set to 6 type @ 63
MTRR addr 0xe8-0xe9 set to 6 type @ 64
MTRR addr 0xe9-0xea set to 6 type @ 65
MTRR addr 0xea-0xeb set to 6 type @ 66
MTRR addr 0xeb-0xec set to 6 type @ 67
MTRR addr 0xec-0xed set to 6 type @ 68
MTRR addr 0xed-0xee set to 6 type @ 69
MTRR addr 0xee-0xef set to 6 type @ 70
MTRR addr 0xef-0xf0 set to 6 type @ 71
MTRR addr 0xf0-0xf1 set to 6 type @ 72
MTRR addr 0xf1-0xf2 set to 6 type @ 73
MTRR addr 0xf2-0xf3 set to 6 type @ 74
MTRR addr 0xf3-0xf4 set to 6 type @ 75
MTRR addr 0xf4-0xf5 set to 6 type @ 76
MTRR addr 0xf5-0xf6 set to 6 type @ 77
MTRR addr 0xf6-0xf7 set to 6 type @ 78
MTRR addr 0xf7-0xf8 set to 6 type @ 79
MTRR addr 0xf8-0xf9 set to 6 type @ 80
MTRR addr 0xf9-0xfa set to 6 type @ 81
MTRR addr 0xfa-0xfb set to 6 type @ 82
MTRR addr 0xfb-0xfc set to 6 type @ 83
MTRR addr 0xfc-0xfd set to 6 type @ 84
MTRR addr 0xfd-0xfe set to 6 type @ 85
MTRR addr 0xfe-0xff set to 6 type @ 86
MTRR addr 0xff-0x100 set to 6 type @ 87
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 5/6.
MTRR: WB selected as default type.
MTRR: 0 base 0x00000000bdc00000 mask 0x0000000fffc00000 type 0
MTRR: 1 base 0x00000000be000000 mask 0x0000000ffe000000 type 0
MTRR: 2 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
MTRR: 3 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 4 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x00 done.
writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
writing P-State 1: 0, 0, 8, 0x1e, 25000; encoded: 0x081e
writing P-State 0: 0, 0, 10, 0x25, 35000; encoded: 0x0a25
WARNING: No CMOS option 'hyper_threading'.
CPU: 0 2 siblings
CPU: 0 has sibling 1
CPU #0 initialized
CPU1: stack_base 0012d000, stack_end 0012dff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor Intel device 1067a
CPU: family 06, model 17, stepping 0a
Enabling cache
CBFS: WARNING: 'cpu_microcode_blob.bin' not found.
CPU: Intel(R) Core(TM)2 CPU T9550 @ 2.66GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x01 done.
writing P-State 3: 0, 0, 6, 0x17, 15000; encoded: 0x0617
writing P-State 3: 0, 0, 6, 0x17, 15000; encoded: 0x0617
writing P-State 3: 0, 0, 6, 0x17, 15000; encoded: 0x0617
writing P-State 3: 0, 0, 6, 0x17, 15000; encoded: 0x0617
writing P-State 2: 0, 0, 8, 0x1e, 25000; encoded: 0x081e
writing P-State 1: 0, 0, 10, 0x25, 35000; encoded: 0x0a25
CPU: 1 2 siblings
CPU #1 initialized
All AP CPUs stopped (1775 loops)
CPU1: stack: 0012d000 - 0012e000, lowest used address 0012dc54, stack used: 940
bytes
DOMAIN: 0000 init
PCI: 00:00.0 init
PCI: 00:02.0 init
Initializing VGA without OPROM. MMIO 0xe1000000
EDID:
00 ff ff ff ff ff ff 00 30 ae 36 40 00 00 00 00
00 12 01 03 80 1e 13 78 ea 4b 85 92 57 56 8a 28
20 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 b0 27 a0 80 51 84 1a 30 30 20
36 00 30 be 10 00 00 19 70 21 a0 98 51 84 1a 30
30 20 36 00 30 be 10 00 00 19 00 00 00 0f 00 95
0a 32 95 0a 28 19 19 00 32 0c 3c 01 00 00 00 fe
00 4c 50 31 34 31 57 50 32 2d 54 4c 42 31 00 1f
Extracted contents:
header: 00 ff ff ff ff ff ff 00
serial number: 30 ae 36 40 00 00 00 00 00 12
version: 01 03
basic params: 80 1e 13 78 ea
chroma info: 4b 85 92 57 56 8a 28 20 50 54
established: 00 00 00
standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1: b0 27 a0 80 51 84 1a 30 30 20 36 00 30 be 10 00 00 19
descriptor 2: 70 21 a0 98 51 84 1a 30 30 20 36 00 30 be 10 00 00 19
descriptor 3: 00 00 00 0f 00 95 0a 32 95 0a 28 19 19 00 32 0c 3c 01
descriptor 4: 00 00 00 fe 00 4c 50 31 34 31 57 50 32 2d 54 4c 42 31
extensions: 00
checksum: 1f
Manufacturer: LEN Model 4036 Serial Number 0
Made week 0 of 2008
EDID version: 1.3
Digital display
Maximum image size: 30 cm x 19 cm
Gamma: 220%
Check DPMS levels
DPMS levels: Standby Suspend Off
Supported color formats: RGB 4:4:4, YCrCb 4:2:2
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: b027a08051841a303020360030be10000019
Did detailed timing
Detailed mode (IN HEX): Clock 101600 KHz, 130 mm x be mm
05a0 05d0 05f0 0720 hborder 0
0384 0387 038d 039e vborder 0
-hsync -vsync
Hex of detail: 7021a09851841a303020360030be10000019
Detailed mode (IN HEX): Clock 101600 KHz, 130 mm x be mm
05a0 05d0 05f0 0720 hborder 0
0384 0387 038d 039e vborder 0
-hsync -vsync
Hex of detail: 0000000f00950a32950a28191900320c3c01
Manufacturer-specified data, tag 15
Hex of detail: 000000fe004c503134315750322d544c4231
ASCII string: LP141WP2-TLB1
Checksum
Checksum: 0x1f (valid)
WARNING: EDID block does NOT fully conform to EDID 1.3.
Missing name descriptor
Missing monitor ranges
bringing up panel at resolution 1440 x 900
Borders 0 x 0
Blank 384 x 26
Sync 32 x 6
Front porch 48 x 3
Spread spectrum clock
Single channel
Polarities 1, 1
Data M1=1775588, N1=8388608
Link frequency 270000 kHz
Link M1=197287, N1=524288
Pixel N=7, M1=15, M2=8, P1=1
Pixel clock 203265 kHz
waiting for panel powerup
panel powered up
PCI: 00:02.1 init
PCI: 00:19.0 init
PCI: 00:1a.0 init
PCI: 00:1a.1 init
PCI: 00:1a.2 init
PCI: 00:1a.7 init
EHCI: Setting up controller.. done.
PCI: 00:1b.0 init
Azalia: base = e5720000
Azalia: codec_mask = 01
HD Audio: Initializing codec #0
Azalia: codec viddid: 14f15051
Azalia: verb_size: 32
Azalia: verb loaded.
PCI: 00:1c.0 init
Initializing ICH9 PCIe root port.
PCI: 00:1c.1 init
Initializing ICH9 PCIe root port.
PCI: 00:1c.2 init
Initializing ICH9 PCIe root port.
PCI: 00:1c.3 init
Initializing ICH9 PCIe root port.
PCI: 00:1d.0 init
PCI: 00:1d.1 init
PCI: 00:1d.2 init
PCI: 00:1d.7 init
EHCI: Setting up controller.. done.
PCI: 00:1e.0 init
PCI: 00:1f.0 init
i82801ix: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
reg 0x0000: 0x02000000
reg 0x0001: 0x00170020
reg 0x0002: 0x00170020
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
Set power off after power failure.
WARNING: No CMOS option 'nmi'.
NMI sources disabled.
rtc_failed = 0x0
RTC Init
Disabling ACPI via APMC:
done.
Locking SMM.
PCI: 00:1f.2 init
i82801ix_sata: initializing...
SATA controller in AHCI mode.
ABAR: e5725000
PCI: 00:1f.3 init
PCI: 02:00.0 init
PCI: 05:00.1 init
PCI: 05:00.2 init
PCI: 05:00.3 init
PCI: 05:00.4 init
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init
Locking EEPROM RFID
init EEPROM done
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:03.1: enabled 0
PCI: 00:03.2: enabled 0
PCI: 00:03.3: enabled 0
IOAPIC: 02: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.7: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 1
PCI: 00:1d.2: enabled 1
PCI: 00:1d.7: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:5c: enabled 1
I2C: 01:5d: enabled 1
I2C: 01:5e: enabled 1
I2C: 01:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 02:00.0: enabled 1
Unknown device path type: 0
: enabled 1
PCI: 05:00.0: enabled 1
PCI: 05:00.1: enabled 1
PCI: 05:00.2: enabled 1
PCI: 05:00.3: enabled 1
PCI: 05:00.4: enabled 1
APIC: 01: enabled 1
BS: Exiting BS_DEV_INIT state.
BS: Entering BS_POST_DEVICE state.
Finalize devices...
Devices finalized
BS: Exiting BS_POST_DEVICE state.
BS: Entering BS_OS_RESUME_CHECK state.
BS: Exiting BS_OS_RESUME_CHECK state.
BS: Entering BS_WRITE_TABLES state.
Writing ISA IRQs
no IRQ found for PCI: 00:00.0
fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16
no IRQ found for PCI: 00:02.1
no IRQ found for PCI: 00:19.0
fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 2 PIN 16
fixed IRQ entry for: PCI: 00:1a.1: INTB# -> IOAPIC 2 PIN 17
fixed IRQ entry for: PCI: 00:1a.2: INTC# -> IOAPIC 2 PIN 18
fixed IRQ entry for: PCI: 00:1a.7: INTC# -> IOAPIC 2 PIN 18
fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16
fixed IRQ entry for: PCI: 00:1c.0: INTA# -> IOAPIC 2 PIN 16
no IRQ found for PCI: 00:1c.1
no IRQ found for PCI: 00:1c.2
no IRQ found for PCI: 00:1c.3
fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16
fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17
fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18
fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16
no IRQ found for PCI: 00:1e.0
no IRQ found for PCI: 00:1f.0
fixed IRQ entry for: PCI: 00:1f.2: INTB# -> IOAPIC 2 PIN 17
fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 2 PIN 18
no IRQ found for PCI: 02:00.0
no IRQ found for PCI: 05:00.0
no IRQ found for PCI: 05:00.1
no IRQ found for PCI: 05:00.2
no IRQ found for PCI: 05:00.3
no IRQ found for PCI: 05:00.4
Wrote the mp table end at: 000f0010 - 000f019c
MPTABLE len: 412
Writing ISA IRQs
no IRQ found for PCI: 00:00.0
fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16
no IRQ found for PCI: 00:02.1
no IRQ found for PCI: 00:19.0
fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 2 PIN 16
fixed IRQ entry for: PCI: 00:1a.1: INTB# -> IOAPIC 2 PIN 17
fixed IRQ entry for: PCI: 00:1a.2: INTC# -> IOAPIC 2 PIN 18
fixed IRQ entry for: PCI: 00:1a.7: INTC# -> IOAPIC 2 PIN 18
fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16
fixed IRQ entry for: PCI: 00:1c.0: INTA# -> IOAPIC 2 PIN 16
no IRQ found for PCI: 00:1c.1
no IRQ found for PCI: 00:1c.2
no IRQ found for PCI: 00:1c.3
fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16
fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17
fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18
fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16
no IRQ found for PCI: 00:1e.0
no IRQ found for PCI: 00:1f.0
fixed IRQ entry for: PCI: 00:1f.2: INTB# -> IOAPIC 2 PIN 17
fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 2 PIN 18
no IRQ found for PCI: 02:00.0
no IRQ found for PCI: 05:00.0
no IRQ found for PCI: 05:00.1
no IRQ found for PCI: 05:00.2
no IRQ found for PCI: 05:00.3
no IRQ found for PCI: 05:00.4
Wrote the mp table end at: bdada010 - bdada19c
MPTABLE len: 412
MP table: 412 bytes.
ACPI: Writing ACPI tables at bdab6000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Found 1 CPU(s) with 2 core(s) each.
clocks between 800 and 2800 MHz.
adding 5 P-States between busratio 6 and a, incl. P0
PSS: 2667MHz power 35000 control 0x4a2b status 0x4a2b
PSS: 2666MHz power 35000 control 0xa25 status 0xa25
PSS: 2133MHz power 25000 control 0x81e status 0x81e
PSS: 1600MHz power 15000 control 0x617 status 0x617
PSS: 800MHz power 12000 control 0x8613 status 0x8613
clocks between 800 and 2800 MHz.
adding 5 P-States between busratio 6 and a, incl. P0
PSS: 2667MHz power 35000 control 0x4a2b status 0x4a2b
PSS: 2666MHz power 35000 control 0xa25 status 0xa25
PSS: 2133MHz power 25000 control 0x81e status 0x81e
PSS: 1600MHz power 15000 control 0x617 status 0x617
PSS: 800MHz power 12000 control 0x8613 status 0x8613
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * MADT
ACPI: added table 4/32, length now 52
current = bdab9fc0
ACPI: * DMAR
ACPI: added table 5/32, length now 56
current = bdaba070
ACPI: * HPET
ACPI: added table 6/32, length now 60
ACPI: done.
ACPI tables: 16560 bytes.
smbios_write_tables: bdab4000
recv_ec_data: 0x37
recv_ec_data: 0x56
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x31
recv_ec_data: 0x36
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x07
recv_ec_data: 0x03
Root Device (LENOVO ThinkPad T400)
CPU_CLUSTER: 0 (Intel GM45 Northbridge)
APIC: 00 (Socket BGA956 CPU)
APIC: acac (Intel Penryn CPU)
DOMAIN: 0000 (Intel GM45 Northbridge)
PCI: 00:00.0 (Intel GM45 Northbridge)
PCI: 00:02.0 (Intel GM45 Northbridge)
PCI: 00:02.1 (Intel GM45 Northbridge)
PCI: 00:03.0 (Intel GM45 Northbridge)
PCI: 00:03.1 (Intel GM45 Northbridge)
PCI: 00:03.2 (Intel GM45 Northbridge)
PCI: 00:03.3 (Intel GM45 Northbridge)
IOAPIC: 02 (IOAPIC)
PCI: 00:19.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1a.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1a.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1a.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1a.7 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1b.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1c.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1c.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1c.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1c.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1c.4 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1c.5 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1d.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1d.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1d.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1d.7 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1e.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1f.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
PNP: 00ff.2 (Lenovo H8 EC)
PCI: 00:1f.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1f.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
I2C: 01:54 (AT24RF08C)
I2C: 01:55 (AT24RF08C)
I2C: 01:56 (AT24RF08C)
I2C: 01:57 (AT24RF08C)
I2C: 01:5c (AT24RF08C)
I2C: 01:5d (AT24RF08C)
I2C: 01:5e (AT24RF08C)
I2C: 01:5f (AT24RF08C)
PCI: 00:1f.5 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 00:1f.6 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
PCI: 02:00.0 (unknown)
Unknown device path type: 0
(unknown)
PCI: 05:00.0 (unknown)
PCI: 05:00.1 (unknown)
PCI: 05:00.2 (unknown)
PCI: 05:00.3 (unknown)
PCI: 05:00.4 (unknown)
APIC: 01 (unknown)
SMBIOS tables: 414 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 8233
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0xbdaac000
rom_table_end = 0xbdaac000
... aligned to 0xbdab0000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-00000000bdaabfff: RAM
3. 00000000bdaac000-00000000bdbfffff: CONFIGURATION TABLES
4. 00000000bdc00000-00000000bfffffff: RESERVED
5. 00000000f0000000-00000000f3ffffff: RESERVED
6. 0000000100000000-000000013fffffff: RAM
Wrote coreboot table at: bdaac000, 0x954 bytes, checksum 486e
coreboot table: 2412 bytes.
CBMEM ROOT 0. bdbff000 00001000
CAR GLOBALS 1. bdbfe000 00001000
USBDEBUG 2. bdbfd000 00001000
CONSOLE 3. bdbdd000 00020000
ROMSTAGE 4. bdbdc000 00001000
GDT 5. bdbdb000 00001000
ACPI RESUME 6. bdadb000 00100000
SMP TABLE 7. bdada000 00001000
ACPI 8. bdab6000 00024000
ACPI GNVS 9. bdab5000 00001000
SMBIOS 10. bdab4000 00001000
COREBOOT 11. bdaac000 00008000
BS: Exiting BS_WRITE_TABLES state.
BS: Entering BS_PAYLOAD_LOAD state.
CBFS: located payload @ ff820378, 585589 bytes.
Loading segment from rom address 0xff820378
code (compression=1)
New segment dstaddr 0x8200 memsize 0x17420 srcaddr 0xff8203cc filesize 0x8215
Loading segment from rom address 0xff820394
code (compression=1)
New segment dstaddr 0x100000 memsize 0x21fc5c srcaddr 0xff8285e1 filesize
0x86d0c
Loading segment from rom address 0xff8203b0
Entry Point 0x00008200
Bounce Buffer at bd854000, 2454440 bytes
Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz:
0x0000000000008215
lb: [0x0000000000100000, 0x000000000013774c)
Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz:
0x0000000000008215
using LZMA
[ 0x00008200, 00017ce3, 0x0001f620) <- ff8203cc
Clearing Segment: addr: 0x0000000000017ce3 memsz: 0x000000000000793d
dest 00008200, end 0001f620, bouncebuffer bd854000
Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000021fc5c filesz:
0x0000000000086d0c
lb: [0x0000000000100000, 0x000000000013774c)
segment: [0x0000000000100000, 0x0000000000186d0c, 0x000000000031fc5c)
bounce: [0x00000000bd854000, 0x00000000bd8dad0c, 0x00000000bda73c5c)
Post relocation: addr: 0x00000000bd854000 memsz: 0x000000000021fc5c filesz:
0x0000000000086d0c
using LZMA
[ 0xbd854000, bda73c5c, 0xbda73c5c) <- ff8285e1
dest bd854000, end bda73c5c, bouncebuffer bd854000
move suffix around: from bd88b74c, to 13774c, amount: 1e8510
Loaded segments
BS: Exiting BS_PAYLOAD_LOAD state.
BS: Entering BS_PAYLOAD_BOOT state.
ICH7 watchdog disabled
Jumping to boot code at 00008200(bdaac000)
CPU0: stack: 0012e000 - 0012f000, lowest used address 0012ea40, stack used:
1472 bytes
entry = 0x00008200
lb_start = 0x00100000
lb_size = 0x0003774c
buffer = 0xbd854000
