Signed-off-by: Paul Moore <[email protected]>
---
 tests/.gitignore                  |    1 
 tests/23-sim-arch_all_basic.c     |   93 +++++++++++++++++++++++++++++++++++++
 tests/23-sim-arch_all_basic.py    |   53 +++++++++++++++++++++
 tests/23-sim-arch_all_basic.tests |   23 +++++++++
 tests/Makefile                    |    3 +
 5 files changed, 172 insertions(+), 1 deletion(-)
 create mode 100644 tests/23-sim-arch_all_basic.c
 create mode 100755 tests/23-sim-arch_all_basic.py
 create mode 100644 tests/23-sim-arch_all_basic.tests

diff --git a/tests/.gitignore b/tests/.gitignore
index 3b68512..fd4ac43 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -23,3 +23,4 @@ util.pyc
 20-live-basic_die
 21-live-basic_allow
 22-sim-basic_chains_array
+23-sim-arch_all_basic
diff --git a/tests/23-sim-arch_all_basic.c b/tests/23-sim-arch_all_basic.c
new file mode 100644
index 0000000..1b39914
--- /dev/null
+++ b/tests/23-sim-arch_all_basic.c
@@ -0,0 +1,93 @@
+/**
+ * Seccomp Library test program
+ *
+ * Copyright (c) 2012 Red Hat <[email protected]>
+ * Author: Paul Moore <[email protected]>
+ */
+
+/*
+ * This library is free software; you can redistribute it and/or modify it
+ * under the terms of version 2.1 of the GNU Lesser General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library; if not, see <http://www.gnu.org/licenses>.
+ */
+
+#include <unistd.h>
+
+#include <seccomp.h>
+
+#include "util.h"
+
+int main(int argc, char *argv[])
+{
+       int rc;
+       struct util_options opts;
+       scmp_filter_ctx ctx;
+
+       rc = util_getopt(argc, argv, &opts);
+       if (rc < 0)
+               goto out;
+
+       ctx = seccomp_init(SCMP_ACT_KILL);
+       if (ctx == NULL)
+               goto out;
+
+       if (seccomp_arch_exist(ctx, SCMP_ARCH_X86)) {
+               rc = seccomp_arch_add(ctx, SCMP_ARCH_X86);
+               if (rc != 0)
+                       goto out;
+       }
+       if (seccomp_arch_exist(ctx, SCMP_ARCH_X86_64)) {
+               rc = seccomp_arch_add(ctx, SCMP_ARCH_X86_64);
+               if (rc != 0)
+                       goto out;
+       }
+       if (seccomp_arch_exist(ctx, SCMP_ARCH_X32)) {
+               rc = seccomp_arch_add(ctx, SCMP_ARCH_X32);
+               if (rc != 0)
+                       goto out;
+       }
+       if (seccomp_arch_exist(ctx, SCMP_ARCH_ARM)) {
+               rc = seccomp_arch_add(ctx, SCMP_ARCH_ARM);
+               if (rc != 0)
+                       goto out;
+       }
+
+       rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(read), 1,
+                             SCMP_A0(SCMP_CMP_EQ, STDIN_FILENO));
+       if (rc != 0)
+               goto out;
+
+       rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(write), 1,
+                             SCMP_A0(SCMP_CMP_EQ, STDOUT_FILENO));
+       if (rc != 0)
+               goto out;
+
+       rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(write), 1,
+                             SCMP_A0(SCMP_CMP_EQ, STDERR_FILENO));
+       if (rc != 0)
+               goto out;
+
+       rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(close), 0);
+       if (rc != 0)
+               goto out;
+
+       rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(rt_sigreturn), 0);
+       if (rc != 0)
+               goto out;
+
+       rc = util_filter_output(&opts, ctx);
+       if (rc)
+               goto out;
+
+out:
+       seccomp_release(ctx);
+       return (rc < 0 ? -rc : rc);
+}
diff --git a/tests/23-sim-arch_all_basic.py b/tests/23-sim-arch_all_basic.py
new file mode 100755
index 0000000..2674636
--- /dev/null
+++ b/tests/23-sim-arch_all_basic.py
@@ -0,0 +1,53 @@
+#!/usr/bin/env python
+
+#
+# Seccomp Library test program
+#
+# Copyright (c) 2012 Red Hat <[email protected]>
+# Author: Paul Moore <[email protected]>
+#
+
+#
+# This library is free software; you can redistribute it and/or modify it
+# under the terms of version 2.1 of the GNU Lesser General Public License as
+# published by the Free Software Foundation.
+#
+# This library is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+# for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this library; if not, see <http://www.gnu.org/licenses>.
+#
+
+import argparse
+import sys
+
+import util
+
+from seccomp import *
+
+def test(args):
+    f = SyscallFilter(KILL)
+    if not f.exist_arch(Arch.X86):
+        f.add_arch(Arch.X86)
+    if not f.exist_arch(Arch.X86_64):
+        f.add_arch(Arch.X86_64)
+    if not f.exist_arch(Arch.X32):
+        f.add_arch(Arch.X32)
+    if not f.exist_arch(Arch.ARM):
+        f.add_arch(Arch.ARM)
+    f.add_rule(ALLOW, "read", Arg(0, EQ, sys.stdin.fileno()))
+    f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stdout.fileno()))
+    f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stderr.fileno()))
+    f.add_rule(ALLOW, "close")
+    f.add_rule(ALLOW, "rt_sigreturn")
+    return f
+
+args = util.get_opt()
+ctx = test(args)
+util.filter_output(args, ctx)
+
+# kate: syntax python;
+# kate: indent-mode python; space-indent on; indent-width 4; mixedindent off;
diff --git a/tests/23-sim-arch_all_basic.tests 
b/tests/23-sim-arch_all_basic.tests
new file mode 100644
index 0000000..02b3a79
--- /dev/null
+++ b/tests/23-sim-arch_all_basic.tests
@@ -0,0 +1,23 @@
+#
+# libseccomp regression test automation data
+#
+#
+# Copyright (c) 2013 Red Hat <[email protected]>
+# Author: Paul Moore <[email protected]
+#
+
+test type: bpf-sim
+
+# Testname             Arch    Syscall         Arg0            Arg1            
Arg2    Arg3    Arg4    Arg5    Result
+23-sim-arch_all_basic  +all    read            0               0x856B008       
10      N       N       N       ALLOW
+23-sim-arch_all_basic  +all    read            1-10            0x856B008       
10      N       N       N       KILL
+23-sim-arch_all_basic  +all    write           1-2             0x856B008       
10      N       N       N       ALLOW
+23-sim-arch_all_basic  +all    write           3-10            0x856B008       
10      N       N       N       KILL
+23-sim-arch_all_basic  +all    close           N               N               
N       N       N       N       ALLOW
+23-sim-arch_all_basic  +all    rt_sigreturn    N               N               
N       N       N       N       ALLOW
+23-sim-arch_all_basic  +all    open            0x856B008       4               
N       N       N       N       KILL
+
+test type: bpf-sim-fuzz
+
+# Testname             StressCount
+23-sim-arch_all_basic  50
diff --git a/tests/Makefile b/tests/Makefile
index 57b7b5f..818caeb 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -57,7 +57,8 @@ TESTS = 01-sim-allow \
        19-sim-missing_syscalls \
        20-live-basic_die \
        21-live-basic_allow \
-       22-sim-basic_chains_array
+       22-sim-basic_chains_array \
+       23-sim-arch_all_basic
 
 DEPS_OBJS = $(OBJS:%.o=%.d)
 DEPS_TESTS = $(TESTS:%=%.d)


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