Some requirements for internal buffers on *SNB* are different from *IVB*. please take carefully and double check the docs.
> From: Zhao Yakui <[email protected]> > > Signed-off-by: Zhao Yakui <[email protected]> > --- > src/gen6_mfc.c | 261 +------------------------------------------------ > src/gen6_mfc.h | 9 ++ > src/gen6_mfc_common.c | 254 ++++++++++++++++++++++++++++++++++++++++++++++++ > src/gen75_mfc.c | 264 > +------------------------------------------------- > 4 files changed, 267 insertions(+), 521 deletions(-) > > diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c > index 760c3b1..81e74ba 100644 > --- a/src/gen6_mfc.c > +++ b/src/gen6_mfc.c > @@ -536,96 +536,6 @@ gen6_mfc_avc_insert_object(VADriverContextP ctx, struct > intel_encoder_context *e > ADVANCE_BCS_BATCH(batch); > } > > -static void gen6_mfc_init(VADriverContextP ctx, > - struct encode_state *encode_state, > - struct intel_encoder_context *encoder_context) > -{ > - struct i965_driver_data *i965 = i965_driver_data(ctx); > - struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; > - dri_bo *bo; > - int i; > - VAEncSequenceParameterBufferH264 *pSequenceParameter = > (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; > - int width_in_mbs = pSequenceParameter->picture_width_in_mbs; > - int height_in_mbs = pSequenceParameter->picture_height_in_mbs; > - > - width_in_mbs = ALIGN(width_in_mbs, 16); > - height_in_mbs = ALIGN(width_in_mbs, 16); > - /*Encode common setup for MFC*/ > - dri_bo_unreference(mfc_context->post_deblocking_output.bo); > - mfc_context->post_deblocking_output.bo = NULL; > - > - dri_bo_unreference(mfc_context->pre_deblocking_output.bo); > - mfc_context->pre_deblocking_output.bo = NULL; > - > - dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); > - mfc_context->uncompressed_picture_source.bo = NULL; > - > - dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); > - mfc_context->mfc_indirect_pak_bse_object.bo = NULL; > - > - for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ > - if ( mfc_context->direct_mv_buffers[i].bo != NULL); > - dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); > - mfc_context->direct_mv_buffers[i].bo = NULL; > - } > - > - for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ > - if (mfc_context->reference_surfaces[i].bo != NULL) > - dri_bo_unreference(mfc_context->reference_surfaces[i].bo); > - mfc_context->reference_surfaces[i].bo = NULL; > - } > - > - dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); > - bo = dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - width_in_mbs * 64, > - 64); > - assert(bo); > - mfc_context->intra_row_store_scratch_buffer.bo = bo; > - > - dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); > - bo = dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - width_in_mbs * height_in_mbs * 16, > - 64); > - assert(bo); > - mfc_context->macroblock_status_buffer.bo = bo; > - > - > dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); > - bo = dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 4 * width_in_mbs * 64, /* 4 * width_in_mbs * 64 */ > - 64); > - assert(bo); > - mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; > - > - dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); > - bo = dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 128 * width_in_mbs, /* 2 * widht_in_mbs * 64 */ > - 0x1000); > - assert(bo); > - mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; > - > - dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); > - mfc_context->mfc_batchbuffer_surface.bo = NULL; > - > - dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); > - mfc_context->aux_batchbuffer_surface.bo = NULL; > - > - if (mfc_context->aux_batchbuffer) > - intel_batchbuffer_free(mfc_context->aux_batchbuffer); > - > - mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, > I915_EXEC_BSD); > - mfc_context->aux_batchbuffer_surface.bo = > mfc_context->aux_batchbuffer->buffer; > - dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); > - mfc_context->aux_batchbuffer_surface.pitch = 16; > - mfc_context->aux_batchbuffer_surface.num_blocks = > mfc_context->aux_batchbuffer->size / 16; > - mfc_context->aux_batchbuffer_surface.size_block = 16; > - > - i965_gpe_context_init(ctx, &mfc_context->gpe_context); > -} > - > static void gen6_mfc_avc_pipeline_picture_programing( VADriverContextP ctx, > struct encode_state *encode_state, > struct intel_encoder_context > *encoder_context) > @@ -644,173 +554,6 @@ static void gen6_mfc_avc_pipeline_picture_programing( > VADriverContextP ctx, > gen6_mfc_avc_ref_idx_state(ctx, encoder_context); > } > > -static void > -gen6_mfc_free_avc_surface(void **data) > -{ > - struct gen6_mfc_avc_surface_aux *avc_surface = *data; > - > - if (!avc_surface) > - return; > - > - dri_bo_unreference(avc_surface->dmv_top); > - avc_surface->dmv_top = NULL; > - dri_bo_unreference(avc_surface->dmv_bottom); > - avc_surface->dmv_bottom = NULL; > - > - free(avc_surface); > - *data = NULL; > -} The above duplicated code has been remove in the master branch, please cherry pick firstly. > - > - > - > - > -static VAStatus gen6_mfc_avc_prepare(VADriverContextP ctx, > - struct encode_state *encode_state, > - struct intel_encoder_context > *encoder_context) > -{ > - struct i965_driver_data *i965 = i965_driver_data(ctx); > - struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; > - struct object_surface *obj_surface; > - struct object_buffer *obj_buffer; > - struct gen6_mfc_avc_surface_aux* gen6_avc_surface; > - dri_bo *bo; > - VAEncPictureParameterBufferH264 *pPicParameter = > (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; > - VAStatus vaStatus = VA_STATUS_SUCCESS; > - int i, j, enable_avc_ildb = 0; > - VAEncSliceParameterBufferH264 *slice_param; > - VACodedBufferSegment *coded_buffer_segment; > - unsigned char *flag = NULL; > - VAEncSequenceParameterBufferH264 *pSequenceParameter = > (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; > - int width_in_mbs = pSequenceParameter->picture_width_in_mbs; > - int height_in_mbs = pSequenceParameter->picture_height_in_mbs; > - > - width_in_mbs = ALIGN(width_in_mbs, 16); > - height_in_mbs = ALIGN(width_in_mbs, 16); > - > - for (j = 0; j < encode_state->num_slice_params_ext && enable_avc_ildb == > 0; j++) { > - assert(encode_state->slice_params_ext && > encode_state->slice_params_ext[j]->buffer); > - slice_param = (VAEncSliceParameterBufferH264 > *)encode_state->slice_params_ext[j]->buffer; > - > - for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; > i++) { > - assert((slice_param->slice_type == SLICE_TYPE_I) || > - (slice_param->slice_type == SLICE_TYPE_SI) || > - (slice_param->slice_type == SLICE_TYPE_P) || > - (slice_param->slice_type == SLICE_TYPE_SP) || > - (slice_param->slice_type == SLICE_TYPE_B)); > - > - if (slice_param->disable_deblocking_filter_idc != 1) { > - enable_avc_ildb = 1; > - break; > - } > - > - slice_param++; > - } > - } > - > - /*Setup all the input&output object*/ > - > - /* Setup current frame and current direct mv buffer*/ > - obj_surface = SURFACE(pPicParameter->CurrPic.picture_id); > - assert(obj_surface); > - i965_check_alloc_surface_bo(ctx, obj_surface, 1, > VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420); > - > - if ( obj_surface->private_data == NULL) { > - gen6_avc_surface = calloc(sizeof(struct gen6_mfc_avc_surface_aux), > 1); > - gen6_avc_surface->dmv_top = > - dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 68 * width_in_mbs * height_in_mbs, > - 64); > - gen6_avc_surface->dmv_bottom = > - dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 68 * width_in_mbs * height_in_mbs, > - 64); > - assert(gen6_avc_surface->dmv_top); > - assert(gen6_avc_surface->dmv_bottom); > - obj_surface->private_data = (void *)gen6_avc_surface; > - obj_surface->free_private_data = (void *)gen6_mfc_free_avc_surface; > - } > - gen6_avc_surface = (struct gen6_mfc_avc_surface_aux*) > obj_surface->private_data; > - mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo = > gen6_avc_surface->dmv_top; > - mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 1].bo = > gen6_avc_surface->dmv_bottom; > - dri_bo_reference(gen6_avc_surface->dmv_top); > - dri_bo_reference(gen6_avc_surface->dmv_bottom); > - > - if (enable_avc_ildb) { > - mfc_context->post_deblocking_output.bo = obj_surface->bo; > - dri_bo_reference(mfc_context->post_deblocking_output.bo); > - } else { > - mfc_context->pre_deblocking_output.bo = obj_surface->bo; > - dri_bo_reference(mfc_context->pre_deblocking_output.bo); > - } > - > - mfc_context->surface_state.width = obj_surface->orig_width; > - mfc_context->surface_state.height = obj_surface->orig_height; > - mfc_context->surface_state.w_pitch = obj_surface->width; > - mfc_context->surface_state.h_pitch = obj_surface->height; > - > - /* Setup reference frames and direct mv buffers*/ > - for(i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++) { > - if ( pPicParameter->ReferenceFrames[i].picture_id != VA_INVALID_ID ) > { > - obj_surface = > SURFACE(pPicParameter->ReferenceFrames[i].picture_id); > - assert(obj_surface); > - if (obj_surface->bo != NULL) { > - mfc_context->reference_surfaces[i].bo = obj_surface->bo; > - dri_bo_reference(obj_surface->bo); > - } > - /* Check DMV buffer */ > - if ( obj_surface->private_data == NULL) { > - > - gen6_avc_surface = calloc(sizeof(struct > gen6_mfc_avc_surface_aux), 1); > - gen6_avc_surface->dmv_top = > - dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 68 * width_in_mbs * height_in_mbs, > - 64); > - gen6_avc_surface->dmv_bottom = > - dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 68 * width_in_mbs * height_in_mbs, > - 64); > - assert(gen6_avc_surface->dmv_top); > - assert(gen6_avc_surface->dmv_bottom); > - obj_surface->private_data = gen6_avc_surface; > - obj_surface->free_private_data = gen6_mfc_free_avc_surface; > - } > - > - gen6_avc_surface = (struct gen6_mfc_avc_surface_aux*) > obj_surface->private_data; > - /* Setup DMV buffer */ > - mfc_context->direct_mv_buffers[i*2].bo = > gen6_avc_surface->dmv_top; > - mfc_context->direct_mv_buffers[i*2+1].bo = > gen6_avc_surface->dmv_bottom; > - dri_bo_reference(gen6_avc_surface->dmv_top); > - dri_bo_reference(gen6_avc_surface->dmv_bottom); > - } else { > - break; > - } > - } > - > - obj_surface = SURFACE(encoder_context->input_yuv_surface); > - assert(obj_surface && obj_surface->bo); > - mfc_context->uncompressed_picture_source.bo = obj_surface->bo; > - dri_bo_reference(mfc_context->uncompressed_picture_source.bo); > - > - obj_buffer = BUFFER (pPicParameter->coded_buf); /* FIXME: fix this later > */ > - bo = obj_buffer->buffer_store->bo; > - assert(bo); > - mfc_context->mfc_indirect_pak_bse_object.bo = bo; > - mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_SIZE; > - mfc_context->mfc_indirect_pak_bse_object.end_offset = > ALIGN(obj_buffer->size_element - 0x1000, 0x1000); > - dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); > - > - dri_bo_map(bo, 1); > - coded_buffer_segment = (VACodedBufferSegment *)bo->virtual; > - flag = (unsigned char *)(coded_buffer_segment + 1); > - *flag = 0; > - dri_bo_unmap(bo); > - > - return vaStatus; > -} > > static VAStatus gen6_mfc_run(VADriverContextP ctx, > struct encode_state *encode_state, > @@ -1521,8 +1264,8 @@ gen6_mfc_avc_encode_picture(VADriverContextP ctx, > int sts; > > for (;;) { > - gen6_mfc_init(ctx, encode_state, encoder_context); > - gen6_mfc_avc_prepare(ctx, encode_state, encoder_context); > + intel_mfc_avc_init(ctx, encode_state, encoder_context); > + intel_mfc_avc_prepare(ctx, encode_state, encoder_context); > /*Programing bcs pipeline*/ > gen6_mfc_avc_pipeline_programing(ctx, encode_state, > encoder_context); //filling the pipeline > gen6_mfc_run(ctx, encode_state, encoder_context); > diff --git a/src/gen6_mfc.h b/src/gen6_mfc.h > index 45423fe..65a73ca 100644 > --- a/src/gen6_mfc.h > +++ b/src/gen6_mfc.h > @@ -255,4 +255,13 @@ extern void > intel_mfc_avc_pipeline_header_programing(VADriverContextP ctx, > struct encode_state > *encode_state, > struct > intel_encoder_context *encoder_context, > struct intel_batchbuffer > *slice_batch); > + > + > +extern void intel_mfc_avc_init(VADriverContextP ctx, > + struct encode_state *encode_state, > + struct intel_encoder_context *encoder_context); > +extern VAStatus intel_mfc_avc_prepare(VADriverContextP ctx, > + struct encode_state *encode_state, > + struct intel_encoder_context > *encoder_context); > + > #endif /* _GEN6_MFC_BCS_H_ */ > diff --git a/src/gen6_mfc_common.c b/src/gen6_mfc_common.c > index a576a53..3621e9e 100644 > --- a/src/gen6_mfc_common.c > +++ b/src/gen6_mfc_common.c > @@ -488,3 +488,257 @@ void > intel_mfc_avc_pipeline_header_programing(VADriverContextP ctx, > } > } > > +void intel_mfc_avc_init(VADriverContextP ctx, > + struct encode_state *encode_state, > + struct intel_encoder_context *encoder_context) > +{ > + struct i965_driver_data *i965 = i965_driver_data(ctx); > + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; > + dri_bo *bo; > + int i; > + VAEncSequenceParameterBufferH264 *pSequenceParameter = > (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; > + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; > + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; > + > + width_in_mbs = ALIGN(width_in_mbs, 16); > + height_in_mbs = ALIGN(width_in_mbs, 16); > + > + /*Encode common setup for MFC*/ > + dri_bo_unreference(mfc_context->post_deblocking_output.bo); > + mfc_context->post_deblocking_output.bo = NULL; > + > + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); > + mfc_context->pre_deblocking_output.bo = NULL; > + > + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); > + mfc_context->uncompressed_picture_source.bo = NULL; > + > + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); > + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; > + > + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ > + if ( mfc_context->direct_mv_buffers[i].bo != NULL); > + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); > + mfc_context->direct_mv_buffers[i].bo = NULL; > + } > + > + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ > + if (mfc_context->reference_surfaces[i].bo != NULL) > + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); > + mfc_context->reference_surfaces[i].bo = NULL; > + } > + > + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); > + bo = dri_bo_alloc(i965->intel.bufmgr, > + "Buffer", > + width_in_mbs * 64, > + 64); > + assert(bo); > + mfc_context->intra_row_store_scratch_buffer.bo = bo; > + > + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); > + bo = dri_bo_alloc(i965->intel.bufmgr, > + "Buffer", > + width_in_mbs * height_in_mbs * 16, > + 64); > + assert(bo); > + mfc_context->macroblock_status_buffer.bo = bo; > + > + > dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); > + bo = dri_bo_alloc(i965->intel.bufmgr, > + "Buffer", > + 4 * width_in_mbs * 64, /* 4 * width_in_mbs * 64 */ > + 64); > + assert(bo); > + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; > + > + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); > + bo = dri_bo_alloc(i965->intel.bufmgr, > + "Buffer", > + 2 * width_in_mbs * 64, /* 2 * width_in_mbs * 64 */ > + 0x1000); > + assert(bo); > + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; > + > + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); > + mfc_context->mfc_batchbuffer_surface.bo = NULL; > + > + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); > + mfc_context->aux_batchbuffer_surface.bo = NULL; > + > + if (mfc_context->aux_batchbuffer) > + intel_batchbuffer_free(mfc_context->aux_batchbuffer); > + > + mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, > I915_EXEC_BSD); > + mfc_context->aux_batchbuffer_surface.bo = > mfc_context->aux_batchbuffer->buffer; > + dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); > + mfc_context->aux_batchbuffer_surface.pitch = 16; > + mfc_context->aux_batchbuffer_surface.num_blocks = > mfc_context->aux_batchbuffer->size / 16; > + mfc_context->aux_batchbuffer_surface.size_block = 16; > + > + i965_gpe_context_init(ctx, &mfc_context->gpe_context); > +} > + > +static void intel_mfc_free_avc_surface(void **data) > +{ > + struct gen6_mfc_avc_surface_aux *avc_surface = *data; > + > + if (!avc_surface) > + return; > + > + dri_bo_unreference(avc_surface->dmv_top); > + avc_surface->dmv_top = NULL; > + dri_bo_unreference(avc_surface->dmv_bottom); > + avc_surface->dmv_bottom = NULL; > + > + free(avc_surface); > + *data = NULL; > +} > + > +VAStatus intel_mfc_avc_prepare(VADriverContextP ctx, > + struct encode_state *encode_state, > + struct intel_encoder_context > *encoder_context) > +{ > + struct i965_driver_data *i965 = i965_driver_data(ctx); > + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; > + struct object_surface *obj_surface; > + struct object_buffer *obj_buffer; > + struct gen6_mfc_avc_surface_aux* gen6_avc_surface; > + dri_bo *bo; > + VAEncPictureParameterBufferH264 *pPicParameter = > (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; > + VAStatus vaStatus = VA_STATUS_SUCCESS; > + int i, j, enable_avc_ildb = 0; > + VAEncSliceParameterBufferH264 *slice_param; > + VACodedBufferSegment *coded_buffer_segment; > + unsigned char *flag = NULL; > + VAEncSequenceParameterBufferH264 *pSequenceParameter = > (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; > + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; > + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; > + > + width_in_mbs = ALIGN(width_in_mbs, 16); > + height_in_mbs = ALIGN(width_in_mbs, 16); > + > + for (j = 0; j < encode_state->num_slice_params_ext && enable_avc_ildb == > 0; j++) { > + assert(encode_state->slice_params_ext && > encode_state->slice_params_ext[j]->buffer); > + slice_param = (VAEncSliceParameterBufferH264 > *)encode_state->slice_params_ext[j]->buffer; > + > + for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; > i++) { > + assert((slice_param->slice_type == SLICE_TYPE_I) || > + (slice_param->slice_type == SLICE_TYPE_SI) || > + (slice_param->slice_type == SLICE_TYPE_P) || > + (slice_param->slice_type == SLICE_TYPE_SP) || > + (slice_param->slice_type == SLICE_TYPE_B)); > + > + if (slice_param->disable_deblocking_filter_idc != 1) { > + enable_avc_ildb = 1; > + break; > + } > + > + slice_param++; > + } > + } > + > + /*Setup all the input&output object*/ > + > + /* Setup current frame and current direct mv buffer*/ > + obj_surface = SURFACE(pPicParameter->CurrPic.picture_id); > + assert(obj_surface); > + i965_check_alloc_surface_bo(ctx, obj_surface, 1, > VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420); > + > + if ( obj_surface->private_data == NULL) { > + gen6_avc_surface = calloc(sizeof(struct gen6_mfc_avc_surface_aux), > 1); > + gen6_avc_surface->dmv_top = > + dri_bo_alloc(i965->intel.bufmgr, > + "Buffer", > + 68 * width_in_mbs * height_in_mbs, > + 64); > + gen6_avc_surface->dmv_bottom = > + dri_bo_alloc(i965->intel.bufmgr, > + "Buffer", > + 68 * width_in_mbs * height_in_mbs, > + 64); > + assert(gen6_avc_surface->dmv_top); > + assert(gen6_avc_surface->dmv_bottom); > + obj_surface->private_data = (void *)gen6_avc_surface; > + obj_surface->free_private_data = (void *)intel_mfc_free_avc_surface; > + } > + gen6_avc_surface = (struct gen6_mfc_avc_surface_aux*) > obj_surface->private_data; > + mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo = > gen6_avc_surface->dmv_top; > + mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 1].bo = > gen6_avc_surface->dmv_bottom; > + dri_bo_reference(gen6_avc_surface->dmv_top); > + dri_bo_reference(gen6_avc_surface->dmv_bottom); > + > + if (enable_avc_ildb) { > + mfc_context->post_deblocking_output.bo = obj_surface->bo; > + dri_bo_reference(mfc_context->post_deblocking_output.bo); > + } else { > + mfc_context->pre_deblocking_output.bo = obj_surface->bo; > + dri_bo_reference(mfc_context->pre_deblocking_output.bo); > + } > + > + mfc_context->surface_state.width = obj_surface->orig_width; > + mfc_context->surface_state.height = obj_surface->orig_height; > + mfc_context->surface_state.w_pitch = obj_surface->width; > + mfc_context->surface_state.h_pitch = obj_surface->height; > + > + /* Setup reference frames and direct mv buffers*/ > + for(i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++) { > + if ( pPicParameter->ReferenceFrames[i].picture_id != VA_INVALID_ID ) > { > + obj_surface = > SURFACE(pPicParameter->ReferenceFrames[i].picture_id); > + assert(obj_surface); > + if (obj_surface->bo != NULL) { > + mfc_context->reference_surfaces[i].bo = obj_surface->bo; > + dri_bo_reference(obj_surface->bo); > + } > + /* Check DMV buffer */ > + if ( obj_surface->private_data == NULL) { > + > + gen6_avc_surface = calloc(sizeof(struct > gen6_mfc_avc_surface_aux), 1); > + gen6_avc_surface->dmv_top = > + dri_bo_alloc(i965->intel.bufmgr, > + "Buffer", > + 68 * width_in_mbs * height_in_mbs, > + 64); > + gen6_avc_surface->dmv_bottom = > + dri_bo_alloc(i965->intel.bufmgr, > + "Buffer", > + 68 * width_in_mbs * height_in_mbs, > + 64); > + assert(gen6_avc_surface->dmv_top); > + assert(gen6_avc_surface->dmv_bottom); > + obj_surface->private_data = gen6_avc_surface; > + obj_surface->free_private_data = intel_mfc_free_avc_surface; > + } > + > + gen6_avc_surface = (struct gen6_mfc_avc_surface_aux*) > obj_surface->private_data; > + /* Setup DMV buffer */ > + mfc_context->direct_mv_buffers[i*2].bo = > gen6_avc_surface->dmv_top; > + mfc_context->direct_mv_buffers[i*2+1].bo = > gen6_avc_surface->dmv_bottom; > + dri_bo_reference(gen6_avc_surface->dmv_top); > + dri_bo_reference(gen6_avc_surface->dmv_bottom); > + } else { > + break; > + } > + } > + > + obj_surface = SURFACE(encoder_context->input_yuv_surface); > + assert(obj_surface && obj_surface->bo); > + mfc_context->uncompressed_picture_source.bo = obj_surface->bo; > + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); > + > + obj_buffer = BUFFER (pPicParameter->coded_buf); /* FIXME: fix this later > */ > + bo = obj_buffer->buffer_store->bo; > + assert(bo); > + mfc_context->mfc_indirect_pak_bse_object.bo = bo; > + mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_SIZE; > + mfc_context->mfc_indirect_pak_bse_object.end_offset = > ALIGN(obj_buffer->size_element - 0x1000, 0x1000); > + dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); > + > + dri_bo_map(bo, 1); > + coded_buffer_segment = (VACodedBufferSegment *)bo->virtual; > + flag = (unsigned char *)(coded_buffer_segment + 1); > + *flag = 0; > + dri_bo_unmap(bo); > + > + return vaStatus; > +} > diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c > index 2a3d9e1..72001d0 100644 > --- a/src/gen75_mfc.c > +++ b/src/gen75_mfc.c > @@ -407,116 +407,6 @@ gen75_mfc_avc_insert_object(VADriverContextP ctx, > struct intel_encoder_context * > ADVANCE_BCS_BATCH(batch); > } > > - > - > -static void > -gen75_mfc_free_avc_surface(void **data) > -{ > - struct gen6_mfc_avc_surface_aux *avc_surface = *data; > - > - if (!avc_surface) > - return; > - > - dri_bo_unreference(avc_surface->dmv_top); > - avc_surface->dmv_top = NULL; > - dri_bo_unreference(avc_surface->dmv_bottom); > - avc_surface->dmv_bottom = NULL; > - > - free(avc_surface); > - *data = NULL; > -} > - > -static void gen75_mfc_init(VADriverContextP ctx, > - struct encode_state *encode_state, > - struct intel_encoder_context *encoder_context) > -{ > - struct i965_driver_data *i965 = i965_driver_data(ctx); > - struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; > - dri_bo *bo; > - int i; > - VAEncSequenceParameterBufferH264 *pSequenceParameter = > (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; > - int width_in_mbs = pSequenceParameter->picture_width_in_mbs; > - int height_in_mbs = pSequenceParameter->picture_height_in_mbs; > - > - width_in_mbs = ALIGN(width_in_mbs, 16); > - height_in_mbs = ALIGN(width_in_mbs, 16); > - > - /*Encode common setup for MFC*/ > - dri_bo_unreference(mfc_context->post_deblocking_output.bo); > - mfc_context->post_deblocking_output.bo = NULL; > - > - dri_bo_unreference(mfc_context->pre_deblocking_output.bo); > - mfc_context->pre_deblocking_output.bo = NULL; > - > - dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); > - mfc_context->uncompressed_picture_source.bo = NULL; > - > - dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); > - mfc_context->mfc_indirect_pak_bse_object.bo = NULL; > - > - for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ > - if ( mfc_context->direct_mv_buffers[i].bo != NULL); > - dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); > - mfc_context->direct_mv_buffers[i].bo = NULL; > - } > - > - for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ > - if (mfc_context->reference_surfaces[i].bo != NULL) > - dri_bo_unreference(mfc_context->reference_surfaces[i].bo); > - mfc_context->reference_surfaces[i].bo = NULL; > - } > - > - dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); > - bo = dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - width_in_mbs * 64, > - 64); > - assert(bo); > - mfc_context->intra_row_store_scratch_buffer.bo = bo; > - > - dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); > - bo = dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - width_in_mbs * height_in_mbs * 16, > - 64); > - assert(bo); > - mfc_context->macroblock_status_buffer.bo = bo; > - > - > dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); > - bo = dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 4 * width_in_mbs * 64, /* 4 * width_in_mbs * 64 */ > - 64); > - assert(bo); > - mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; > - > - dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); > - bo = dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 2 * width_in_mbs * 64, /* 2 * width_in_mbs * 64 */ > - 0x1000); > - assert(bo); > - mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; > - > - dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); > - mfc_context->mfc_batchbuffer_surface.bo = NULL; > - > - dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); > - mfc_context->aux_batchbuffer_surface.bo = NULL; > - > - if (mfc_context->aux_batchbuffer) > - intel_batchbuffer_free(mfc_context->aux_batchbuffer); > - > - mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, > I915_EXEC_BSD); > - mfc_context->aux_batchbuffer_surface.bo = > mfc_context->aux_batchbuffer->buffer; > - dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); > - mfc_context->aux_batchbuffer_surface.pitch = 16; > - mfc_context->aux_batchbuffer_surface.num_blocks = > mfc_context->aux_batchbuffer->size / 16; > - mfc_context->aux_batchbuffer_surface.size_block = 16; > - > - i965_gpe_context_init(ctx, &mfc_context->gpe_context); > -} > - > static void > gen75_mfc_pipe_buf_addr_state_bplus(VADriverContextP ctx, > struct intel_encoder_context *encoder_context) > @@ -856,156 +746,6 @@ static void gen75_mfc_avc_pipeline_picture_programing( > VADriverContextP ctx, > gen75_mfc_avc_ref_idx_state(ctx, encoder_context); > } > > - > -static VAStatus gen75_mfc_avc_prepare(VADriverContextP ctx, > - struct encode_state *encode_state, > - struct intel_encoder_context > *encoder_context) > -{ > - struct i965_driver_data *i965 = i965_driver_data(ctx); > - struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; > - struct object_surface *obj_surface; > - struct object_buffer *obj_buffer; > - struct gen6_mfc_avc_surface_aux* gen6_avc_surface; > - dri_bo *bo; > - VAEncPictureParameterBufferH264 *pPicParameter = > (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; > - VAStatus vaStatus = VA_STATUS_SUCCESS; > - int i, j, enable_avc_ildb = 0; > - VAEncSliceParameterBufferH264 *slice_param; > - VACodedBufferSegment *coded_buffer_segment; > - unsigned char *flag = NULL; > - VAEncSequenceParameterBufferH264 *pSequenceParameter = > (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; > - int width_in_mbs = pSequenceParameter->picture_width_in_mbs; > - int height_in_mbs = pSequenceParameter->picture_height_in_mbs; > - > - width_in_mbs = ALIGN(width_in_mbs, 16); > - height_in_mbs = ALIGN(width_in_mbs, 16); > - > - for (j = 0; j < encode_state->num_slice_params_ext && enable_avc_ildb == > 0; j++) { > - assert(encode_state->slice_params_ext && > encode_state->slice_params_ext[j]->buffer); > - slice_param = (VAEncSliceParameterBufferH264 > *)encode_state->slice_params_ext[j]->buffer; > - > - for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; > i++) { > - assert((slice_param->slice_type == SLICE_TYPE_I) || > - (slice_param->slice_type == SLICE_TYPE_SI) || > - (slice_param->slice_type == SLICE_TYPE_P) || > - (slice_param->slice_type == SLICE_TYPE_SP) || > - (slice_param->slice_type == SLICE_TYPE_B)); > - > - if (slice_param->disable_deblocking_filter_idc != 1) { > - enable_avc_ildb = 1; > - break; > - } > - > - slice_param++; > - } > - } > - > - /*Setup all the input&output object*/ > - > - /* Setup current frame and current direct mv buffer*/ > - obj_surface = SURFACE(pPicParameter->CurrPic.picture_id); > - assert(obj_surface); > - i965_check_alloc_surface_bo(ctx, obj_surface, 1, > VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420); > - > - if ( obj_surface->private_data == NULL) { > - gen6_avc_surface = calloc(sizeof(struct gen6_mfc_avc_surface_aux), > 1); > - gen6_avc_surface->dmv_top = > - dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 68* width_in_mbs * height_in_mbs, > - 64); > - gen6_avc_surface->dmv_bottom = > - dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 68* width_in_mbs * height_in_mbs, > - 64); > - assert(gen6_avc_surface->dmv_top); > - assert(gen6_avc_surface->dmv_bottom); > - obj_surface->private_data = (void *)gen6_avc_surface; > - obj_surface->free_private_data = (void *)gen75_mfc_free_avc_surface; > - } > - gen6_avc_surface = (struct gen6_mfc_avc_surface_aux*) > obj_surface->private_data; > - mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo = > gen6_avc_surface->dmv_top; > - mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 1].bo = > gen6_avc_surface->dmv_bottom; > - dri_bo_reference(gen6_avc_surface->dmv_top); > - dri_bo_reference(gen6_avc_surface->dmv_bottom); > - > - if (enable_avc_ildb) { > - mfc_context->post_deblocking_output.bo = obj_surface->bo; > - dri_bo_reference(mfc_context->post_deblocking_output.bo); > - } else { > - mfc_context->pre_deblocking_output.bo = obj_surface->bo; > - dri_bo_reference(mfc_context->pre_deblocking_output.bo); > - } > - > - mfc_context->surface_state.width = obj_surface->orig_width; > - mfc_context->surface_state.height = obj_surface->orig_height; > - mfc_context->surface_state.w_pitch = obj_surface->width; > - mfc_context->surface_state.h_pitch = obj_surface->height; > - > - /* Setup reference frames and direct mv buffers*/ > - for(i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++) { > - if ( pPicParameter->ReferenceFrames[i].picture_id != VA_INVALID_ID ) > { > - obj_surface = > SURFACE(pPicParameter->ReferenceFrames[i].picture_id); > - assert(obj_surface); > - if (obj_surface->bo != NULL) { > - mfc_context->reference_surfaces[i].bo = obj_surface->bo; > - dri_bo_reference(obj_surface->bo); > - } > - /* Check DMV buffer */ > - if ( obj_surface->private_data == NULL) { > - > - gen6_avc_surface = calloc(sizeof(struct > gen6_mfc_avc_surface_aux), 1); > - gen6_avc_surface->dmv_top = > - dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 68* width_in_mbs * height_in_mbs, > - 64); > - gen6_avc_surface->dmv_bottom = > - dri_bo_alloc(i965->intel.bufmgr, > - "Buffer", > - 68* width_in_mbs * height_in_mbs, > - 64); > - assert(gen6_avc_surface->dmv_top); > - assert(gen6_avc_surface->dmv_bottom); > - obj_surface->private_data = gen6_avc_surface; > - obj_surface->free_private_data = gen75_mfc_free_avc_surface; > - } > - > - gen6_avc_surface = (struct gen6_mfc_avc_surface_aux*) > obj_surface->private_data; > - /* Setup DMV buffer */ > - mfc_context->direct_mv_buffers[i*2].bo = > gen6_avc_surface->dmv_top; > - mfc_context->direct_mv_buffers[i*2+1].bo = > gen6_avc_surface->dmv_bottom; > - dri_bo_reference(gen6_avc_surface->dmv_top); > - dri_bo_reference(gen6_avc_surface->dmv_bottom); > - } else { > - break; > - } > - } > - > - obj_surface = SURFACE(encoder_context->input_yuv_surface); > - assert(obj_surface && obj_surface->bo); > - mfc_context->uncompressed_picture_source.bo = obj_surface->bo; > - dri_bo_reference(mfc_context->uncompressed_picture_source.bo); > - > - obj_buffer = BUFFER (pPicParameter->coded_buf); /* FIXME: fix this later > */ > - bo = obj_buffer->buffer_store->bo; > - assert(bo); > - mfc_context->mfc_indirect_pak_bse_object.bo = bo; > - mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_SIZE; > - mfc_context->mfc_indirect_pak_bse_object.end_offset = > ALIGN(obj_buffer->size_element - 0x1000, 0x1000); > - dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); > - > - dri_bo_map(bo, 1); > - coded_buffer_segment = (VACodedBufferSegment *)bo->virtual; > - flag = (unsigned char *)(coded_buffer_segment + 1); > - *flag = 0; > - dri_bo_unmap(bo); > - > - return vaStatus; > -} > - > - > static VAStatus gen75_mfc_run(VADriverContextP ctx, > struct encode_state *encode_state, > struct intel_encoder_context *encoder_context) > @@ -1868,8 +1608,8 @@ gen75_mfc_avc_encode_picture(VADriverContextP ctx, > int sts; > > for (;;) { > - gen75_mfc_init(ctx, encode_state, encoder_context); > - gen75_mfc_avc_prepare(ctx, encode_state, encoder_context); > + intel_mfc_avc_init(ctx, encode_state, encoder_context); > + intel_mfc_avc_prepare(ctx, encode_state, encoder_context); > /*Programing bcs pipeline*/ > gen75_mfc_avc_pipeline_programing(ctx, encode_state, > encoder_context); //filling the pipeline > gen75_mfc_run(ctx, encode_state, encoder_context); _______________________________________________ Libva mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/libva
