On Thu, Nov 10, 2016 at 5:56 PM, Zhao Yakui <[email protected]> wrote:
> V1->V2: Use the is_16bpp instead of is_10bit
>
> Signed-off-by: Zhao Yakui <[email protected]>
lgtm.
Sean
> ---
> src/i965_gpe_utils.c | 16 ++++++++++++----
> src/i965_gpe_utils.h | 1 +
> 2 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c
> index a29237b..d824c18 100644
> --- a/src/i965_gpe_utils.c
> +++ b/src/i965_gpe_utils.c
> @@ -1864,8 +1864,12 @@ gen9_gpe_context_add_surface(struct i965_gpe_context
> *gpe_context,
> height = gpe_resource->height / 2;
> pitch = gpe_resource->pitch;
>
> - if (gpe_surface->is_media_block_rw)
> - width = (ALIGN(width, 4) >> 2);
> + if (gpe_surface->is_media_block_rw) {
> + if (gpe_surface->is_16bpp)
> + width = (ALIGN(width * 2, 4) >> 2);
> + else
> + width = (ALIGN(width, 4) >> 2);
> + }
>
> if (tiling == I915_TILING_Y) {
> tile_alignment = 32;
> @@ -1897,8 +1901,12 @@ gen9_gpe_context_add_surface(struct i965_gpe_context
> *gpe_context,
> height = gpe_resource->height;
> pitch = gpe_resource->pitch;
>
> - if (gpe_surface->is_media_block_rw)
> - width = (ALIGN(width, 4) >> 2);
> + if (gpe_surface->is_media_block_rw) {
> + if (gpe_surface->is_16bpp)
> + width = (ALIGN(width * 2, 4) >> 2);
> + else
> + width = (ALIGN(width, 4) >> 2);
> + }
>
> gen9_gpe_set_2d_surface_state(ss,
> gpe_surface->cacheability_control,
> diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h
> index 39a6fad..7415578 100644
> --- a/src/i965_gpe_utils.h
> +++ b/src/i965_gpe_utils.h
> @@ -417,6 +417,7 @@ struct i965_gpe_surface
> unsigned int is_uv_surface:1;
> unsigned int is_media_block_rw:1;
> unsigned int is_raw_buffer:1;
> + unsigned int is_16bpp :1;
>
> unsigned int vert_line_stride_offset;
> unsigned int vert_line_stride;
> --
> 1.9.0
>
> _______________________________________________
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> https://lists.freedesktop.org/mailman/listinfo/libva
--
Sean V. Kelley <[email protected]>
Open Source Technology Center / SSG
Intel Corp.
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