Signed-off-by: Xiang, Haihao <haihao.xi...@intel.com> --- src/i965_gpe_utils.c | 16 ++++++++++++++++ src/i965_gpe_utils.h | 19 +++++++++++++++++++ src/intel_driver.h | 6 ++++++ 3 files changed, 41 insertions(+)
diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c index e7f1c25..4ac7ab7 100644 --- a/src/i965_gpe_utils.c +++ b/src/i965_gpe_utils.c @@ -2437,3 +2437,19 @@ gen8_gpe_context_add_surface(struct i965_gpe_context *gpe_context, dri_bo_unmap(gpe_context->surface_state_binding_table.bo); } + +void +gen8_gpe_mi_conditional_batch_buffer_end(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_conditional_batch_buffer_end_parameter *param) +{ + __OUT_BATCH(batch, (MI_CONDITIONAL_BATCH_BUFFER_END | + (1 << 21) | + (4 - 2))); /* Always use PPGTT */ + __OUT_BATCH(batch, param->compare_data); + __OUT_RELOC64(batch, + param->bo, + I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, + param->offset); + +} diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h index cbf3b05..3e10cf8 100644 --- a/src/i965_gpe_utils.h +++ b/src/i965_gpe_utils.h @@ -73,6 +73,20 @@ struct gpe_dynamic_state_parameter unsigned int sampler_offset; }; +#define PIPE_CONTROL_FLUSH_NONE 0 +#define PIPE_CONTROL_FLUSH_WRITE_CACHE 1 +#define PIPE_CONTROL_FLUSH_READ_CACHE 2 + +struct gpe_pipe_control_parameter +{ + dri_bo *bo; + unsigned int offset; + unsigned int flush_mode; + unsigned int disable_cs_stall; + unsigned int dw0; + unsigned int dw1; +}; + struct i965_gpe_context { struct { @@ -531,4 +545,9 @@ gen8_gpe_context_add_surface(struct i965_gpe_context *gpe_context, struct i965_gpe_surface *gpe_surface, int index); +extern void +gen8_gpe_mi_conditional_batch_buffer_end(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_conditional_batch_buffer_end_parameter *param); + #endif /* _I965_GPE_UTILS_H_ */ diff --git a/src/intel_driver.h b/src/intel_driver.h index dcdc03b..4ff707d 100644 --- a/src/intel_driver.h +++ b/src/intel_driver.h @@ -76,12 +76,18 @@ #define CMD_PIPE_CONTROL_IS_FLUSH (1 << 11) #define CMD_PIPE_CONTROL_TC_FLUSH (1 << 10) #define CMD_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) +#define CMD_PIPE_CONTROL_FLUSH_ENABLE (1 << 7) #define CMD_PIPE_CONTROL_DC_FLUSH (1 << 5) #define CMD_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define CMD_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define CMD_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) #define CMD_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) +#define CMD_PIPE_CONTROL_GLOBAL_GTT_GEN8 (1 << 24) +#define CMD_PIPE_CONTROL_LOCAL_PGTT_GEN8 (0 << 24) +#define CMD_PIPE_CONTROL_VFC_INVALIDATION_GEN8 (1 << 4) +#define CMD_PIPE_CONTROL_CC_INVALIDATION_GEN8 (1 << 3) +#define CMD_PIPE_CONTROL_SC_INVALIDATION_GEN8 (1 << 2) struct intel_batchbuffer; -- 1.9.1 _______________________________________________ Libva mailing list Libva@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/libva