Hi Amit, Apologies for the delayed response.
> Yes, the earlier the better to starting incorporating the > changes in Linux. Agreed - this is a priority for ARM. (We're at least a little behind the curve on putting the arch and CPU-centric stuff in shared arch code, given the device-specific code understandably proliferating now in mach trees.) That said, I suspect Jon's 2-3 weeks is a little optimistic, as we need to pass some review barriers before releasing it under GPL. I won't go into the details on-list, but there are restrictions in the current BSD-augmented license terms that won't work well for you guys. Our plan is definitely to get this into the Linaro kernel for the 11.05 release. My preferred approach is to get it into Catalin's public tree by early Q1, so that we stand a chance of merging it into the Linaro consolidated kernel. ARM will push it further upstream ASAP from Catalin's tree, but no guarantee that'll happen prior to 11.05. I think the staged approach is necessary, as Linaro is the place to prove the code integrated for multiple platforms. Of course, let me know if you don't think we can make this work in time.. -Bobby > -----Original Message----- > From: linaro-dev-boun...@lists.linaro.org > [mailto:linaro-dev-boun...@lists.linaro.org] On Behalf Of > Amit Kucheria > Sent: 13 October 2010 09:42 > To: Jon Callan > Cc: linaro-dev@lists.linaro.org > Subject: Re: Common ARM context save/restore code > > Jon, > > Yes, the earlier the better to starting incorporating the > changes in Linux. Especially if you're interested in seeing > this included in the kernel in 6 months time. > > /Amit > > > On Tue, Oct 12, 2010 at 3:57 PM, Jon Callan > <jon.cal...@arm.com> wrote: > > Amit, > > > > Yes, it does seem a little tight doesn't it? Bobby is who > I'm working with on this, btw. > > > > Maybe I could get the source code tidied and open it up in > 2-3 weeks > > time? Then we can all work on it together :-) > > > > Jon. > > > > -----Original Message----- > > From: Amit Kucheria [mailto:amit.kuche...@linaro.org] > > Sent: 12 October 2010 13:32 > > To: Jon Callan > > Cc: linaro-dev@lists.linaro.org > > Subject: Re: Common ARM context save/restore code > > > > :) > > > > As you can see, if you make the source available somewhere, > there is > > plenty of people interested in dissecting it. > > > > Jon, if you start working on them in December, we'll almost > certainly > > miss the 2.6.38 merge window to get it integrated to mainline. > > > > /Amit > > p.s. /me makes a note to talk to bo...@arm et al. regarding this. > > > > On 10 Oct 12, Jon Callan wrote: > >> Well, my plan was to... er... post a message on linaro-dev > and see happened! > >> > >> And yes, refactor as an ARM-common driver + SoC-specific > stubs, that sounds about right. > >> > >> I plan to work on the Linux integration from 1st December. > I have done some Linux kernel work before but I'm a little rusty. > >> > >> Jon. > >> > >> -----Original Message----- > >> From: Amit Kucheria [mailto:amit.kuche...@linaro.org] > >> Sent: 12 October 2010 12:04 > >> To: Jon Callan > >> Cc: linaro-dev@lists.linaro.org > >> Subject: Re: Common ARM context save/restore code > >> > >> Jon, > >> > >> I'm sure you anticipated this - What is your plan for pushing this > >> out to the kernel? :) > >> > >> And how can we help? > >> > >> On Tue, Oct 12, 2010 at 1:39 PM, Jon Callan > <jon.cal...@arm.com> wrote: > >> > Vishwa, > >> > > >> > I have a more-or-less complete set of example code for > CPU context save/restore, currently supporting A5/A8/A9 and > with planned support for Eagle. > >> > > >> > It is structured as "firmware" at the moment, but it > would be much better if it was integrated into the ARM Linux > kernel. The idea is the kernel calls it from CPUidle, and it > saves all CPU context and cuts the power. Then when power > returns, it restores all CPU context and returns to the > kernel as if nothing has happened. > >> > > >> > It handles just the CPU and cluster context, which on > A9mpcore includes MMU, GIC, VFP, SCU, L2cc, Debug, etc. It > takes care of cleaning caches and entering/leaving the > coherency domain. There is also support for TrustZone, but as > you say that's quite platform-specific. > >> > > >> > So we would need to integrate this with the SoC-specific > code somehow. > >> > >> So you need to refactor these to an ARM-common driver and > SoC-specific stubs? > >> > >> /Amit > >> > >> -- IMPORTANT NOTICE: The contents of this email and any > attachments are confidential and may also be privileged. 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