On 1 September 2011 12:02, Pawel Moll <pawel.m...@arm.com> wrote: >> If you search the specs on http://infocenter.arm.com for "Main ID >> register" you should get all the numbers you wish for :-) > > Apparently it's called "ID Code Register" for ARM9 and the expected (not > tested ;-) values would be: > > ARM926 - 0x926 > ARM946 - 0x946 > ARM966 - 0x966 > > etc., you get the picture :-) > > Paweł > > PS. The number I quoted are valid when "CPU implementer" == 0x41 (ARM Ltd.)
What about non-ARM implementations from e.g. Qualcomm and Marvell? A Marvell I have on hand reports this: Processor : Feroceon 88FR131 rev 1 (v5l) BogoMIPS : 1192.75 Features : swp half fastmult edsp CPU implementer : 0x56 CPU architecture: 5TE CPU variant : 0x2 CPU part : 0x131 CPU revision : 1 Here the Processor line contains the exact name of the CPU, which can presumably derived from the ID register somehow. I don't have a Qualcomm processor handy at the moment. > PPS. I think older (and MMU-less) parts were using other scheme... They do, but I wouldn't worry about that since they're not likely to be running gcc anyway. -- Mans Rullgard Multimedia mans.rullg...@linaro.org _______________________________________________ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
