commit 67ee3dd (mx53: Make PLL2 to be the parent of UART clock)
changed UART parent from PLL3 to PLL2.
Do not reconfigure PLL2 in order to avoid a messed up console output.
Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
---
This applies against Linaro-u-boot-2012.04.2
arch/arm/cpu/armv7/mx5/clock.c | 9 ---------
1 files changed, 0 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index c7613f0..dfee8e6 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -796,15 +796,6 @@ static int config_periph_clk(u32 ref, u32 freq)
while (__raw_readl(&mxc_ccm->cdhipr) != 0)
;
- /* Setup PLL2 */
- ret = calc_pll_params(ref, freq, &pll_param);
- if (ret != 0) {
- printf("Error:Can't find pll parameters: %d\n",
- ret);
- return ret;
- }
- config_pll_clk(PLL2_CLOCK, &pll_param);
-
/* Switch peripheral back */
__raw_writel(new_cbcdr, &mxc_ccm->cbcdr);
__raw_writel(old_cbcmr, &mxc_ccm->cbcmr);
--
1.7.1
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