== This week == * Wrote some patches to make SMS schedule register moves. They made a significant difference to some libav loops. I'm running a regression test on pwoerpc-ibm-aix5.3.0 and will submit upstream next week if all goes OK.
* Looked at why mjpegenc was so much worse with SMS. Turned out to be a register spilling problem. Found that -fira-algorithm=priority avoids the regression and makes several other tests better too. (I just tested that to see whether there was a feasible register allocation for these cases; -fira-algorithm=priority isn't the way to go.) * Saw that the register allocator seemed to be tripping over the XImode "structure" values, and that we still had one vector move per structure element by the time we get to the scheduling passes. Eliminated those with a combination of one fix and one hack. It seemed to avoid the allocation problems. * Patch review (Linaro and upstream). * Backported libgcc visibility fix to 4.6 and 4.5. == Next week == * Submit register-scheduling patch. * Submit memory cost patch (from auto-inc-dec changes) * Possibly submit the auto-inc-dec changes themselves, depending on how the rtx cost discussion goes. Richard _______________________________________________ linaro-toolchain mailing list linaro-toolchain@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-toolchain
