Hi Andrew,

On 27 June 2016 at 19:32, Pinski, Andrew <andrew.pin...@cavium.com> wrote:
>>        No gain expected in implementing an Ifunc'ed version of the library.
>
> How did you prove that?  What hardware did you run this on to prove it?
> Also have you thought at least doing an ifunc version for 128bit atomics?

up to 64bits, the calls to the libatomic routines are inlined and
armv8.1 CAS and load-operate version are used when the application is
build for armv8.1 architecture.  For 128bits, a call to the lib is
made which uses the same LL/SC implementation with or without LSE
support, as CAS and load-operate instruction don't support this data
size.

I don't have armv8.1 hardware and made the analysis on the generated
assembler. Do you have use case on your side where an ifunc version
can be useful ? I'm not aware of an algorithm which can replace
effectively LL/SC implementation with shorter CAS, do you have any
pointers ? Maybe CASP can be used in some cases, I'll investigate it.

Thanks
Yvan


> Thanks,
> Andrew
>
> -----Original Message-----
> From: linaro-toolchain [mailto:linaro-toolchain-boun...@lists.linaro.org] On 
> Behalf Of Yvan Roux
> Sent: Monday, June 27, 2016 1:40 AM
> To: Linaro Toolchain Mailman List <linaro-toolchain@lists.linaro.org>
> Subject: [ACTIVITY] Week 25
>
> == Progress ==
> o Extended Validation (1/10)
>    - Benchmarking job babysitting.
>
> o Upstream GCC (4/10)
>      - ARMv8.1 libatomic: Analysis completed.
>         No gain expected in implementing an Ifunc'ed version of the library.
>      - Working on __sync buitlins potential fix.
>
> o Misc (5/10)
>    * Various meetings and discussions.
>    * Internal appraisal
>
> == Plan ==
> o Continue on-going tasks (__sync, benchmarking) 
> _______________________________________________
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