Glen, I had a Columbia grad try to explain pipelining to me in 1983. Wider memory somehow captured the idea for me. Thanks. What is most telling for me about the true nature of MP or threaded programming on the bare metal is the z/OS architecture POP explanation that some instructions are interruptible because they take so long. Compare and swap instructiong and test and set somehow helped me start to grasp parallel and multi processing.
Can you recommended a book on MP concepts that won't put me to sleep altogether? Paul Hanrahan -----Original Message----- From: Linux on 390 Port [mailto:[EMAIL PROTECTED] On Behalf Of glen herrmannsfeldt Sent: Saturday, December 13, 2003 2:19 AM To: [EMAIL PROTECTED] Subject: Pipelining The 360/91 and maybe the 6600 were prominent in books on pipelined architectures for many years. The goal of the 360/91 was one instruction per clock cycle, so not superscalar, but still a tough goal with slow core memory. (16 way interleaved, but at over 10 times the cycle time.) A pipelined execution unit is not necessary for superscalar performance, as a machine could simultaneously execute any number of one cycle instructions. Means for fetching, decoding, and arranging execution units to execute those instructions may or may not need pipelining. (Following RISC philosophy, one could leave many of the important decisions up to the compiler, and use wide enough memory to fetch enough instructions on one cycle.) -- glen
