Hello,
> > To my understanding ELKS is aimed as a teaching project as well
as an
> > embedded OS, there are huge numbers of out of date machine being
buried
> > as trash, hopeful ELKS will bring new life to these machines.
Some
> > machine based around the 8086 do have memory protection (the
Psion
> > Series 3 for example), where this is available I expect it will
be used
> > BUT it is not a requirement for ELKS.
> What a memory protection if a processor itsef doesn't have
protected mode.
> You can design what you can to death, but program running in user
space may
> do what ever it want.
I'm sorry, I must correct myself. The sentence above isn't true.
In monday I was writing the following text.
-----------------------------------------------------------
Lying in my bath I'v got an idea yesterday. It's about how to add
protected mode to processors which doesn't have one.
Lets have processor with 16 bit address bus. We construct simple
hardware which extends address range. For instance it have 8 PDR
registers, each have 8 bits. Four register for USER mode, and four
for KERNEL mode. Each register is describing one page. Page have
16kB.
PDR register description:
2 bits of mode
00 Access disabled (page is missing)
01 Read Only
10 Unused combination
11 Read/Write
6 bits of page address
Our MMU takes upper two address lines A14 and A15 and with signal K/U
which is remembered in simple R/S register these 3 bits select one
of 8 PDR registers. Upper two bits are compared with control signals
from processor. If is something wrong and CPU is doing anything
forbidden then NMI is raised. If all is ok then MMU takes low six
bits from PDR and gives it on A14 - A19. And thus it can address 1MB
of RAM divided into 16kB pages.
Contents of MMU register is mapped to I/O range. And can be changed,
but only if K/U is in KERNEL mode.
K/U can be set to USER mode by accessing one address in I/O range. We
can use for instance an OUT or IN instruction. Only access to
address is important.
Than if K/U is in KERNEL state then processor can modify MMU and K/U
.
But problem is how to enable set K/U from USER to KERNEL mode. It
must be done if IRQ is coming form device, if NMI is coming from
MMU. A special piece of hardware must reside on bus and detect if an
IRQ is coming and set K/U to Kernel mode transparently. And this is
difficult. The mode must be changed after SP is stored to user space
stack, and before interrupt vector is loaded from kernel space
memory.
System call can be done as writing to another hardware register
which rises an interrupt. PC is stored in user space and kernel input
routine first store SP and reload its own KERNEL SP. Register can
be saved as needed an can be used for giving parameters to kernel
and sending values to USER.
And now we can block all necessary I/O devices with K/U signal. Then
CPU can manipulate with I/O only if it's in KERNEL mode.
And if CPU is in USER mode and is doing something wrong. Then NMI is
raised and CPU goes to KERNEL.
Please if you know, how to implement the hardware needed to set K/U
to KERNEL mode, let me know.
-----------------------------------------------------------------
> > > But we can design our own processor, and model it in
FPGA
> > > (Xilinx or other). This needs much work and advanced
experience
> > > in hardware projecting and construction.
> > [<Simon Wood>]
> > Possible but seems like an awful lot of work for a 'free'
project.
> Yes it's lot of work. But if target is more interesant, more
peoples will
> help.
I'm still dreaming about it. Looking around the web I found some
tools for FPGA projecting, which I'm going to try.
> > > Second way is software way, its way of emulators. You
can
> > > emulate some hardware architecture which meet your needs.
Bad
> > > news is that this cost much in speed. Slowdown need not be
to
> > > big, not as you expect. And well designed hardware may
have
> > > some advantages in memory savings You can code a often
used
> > > sequences to one simple instruction and save much space in
code
> > > segment.
> > > If you begin with software emulator you may in future
build
> > > an hardware which use same instruction set and thus save
all
> > > previously done work.
> > [<Simon Wood>]
> > Software Emulators can fill the gap before hardware is available,
but
> > they often don't behave exactly as the real thing. If you have a
> > particular hardware target in mind then they are a useful tool.
>
> I' was thinking about PDP-11. It's 16-bit architecture, has memory
> protection, it's nice architecture. Some software emulator exists.
Have anyone anything to say to this. PDP-11 is known architecture,
but if we will do all from scratch, maybe is better to project own
processor.
I'm collecting on my web some informations about PDP-11. Now its on
page http://www.linuxfan.com/radek_hnilica/pdp11/index.html. Latest
changes are still on my Quaderno, because I can't login to web server
today.
Radek Hnilica
E-mail: [EMAIL PROTECTED]
http://www.linuxfan.com/~radek_hnilica
