On Tue, 3 Aug 1999, Alan Cox wrote:
> > Hmm, looking at that it needs somebody to go through one instruction at
> > a time very carefully. Eg AX and SI are stashed in the code segment,
> > they could be stashed in the DS. Interrupts don't have to be
> > disabled 'cause you can use the SS feature:
> > mov ss,ax
> > mov sp,[bx]
>
> That doesnt work on early 8088's
****!
You're right; and I quote:
If the destination is SS interrupts are disabled except on early buggy
808x CPUs. Some CPUs disable interrupts if the destination is any of
the segment registers.
I suppose we can't just ignore a few buggered old chips :-)
--
Rob. (Robert de Bath <http://poboxes.com/rdebath>)
<rdebath @ poboxes.com> <http://www.cix.co.uk/~mayday>
