> Note, however, that the assumption that the TSC and the LAPIC
> timer breaking under the same conditions will not always
> be true going forward.
>
> In particular, there will be systems with a fully functional TSC
> and a broken LAPIC timer. But I guess we'll cross that bridge
> when we come to it...
Sigh, is there any kind of breakage which is not invented yet ?
I guess we need to have a seperate option for the TSC vs. C2 then.
tglx
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