On Mon, Jun 04, 2018 at 12:27:57PM +0200, Sebastian Andrzej Siewior wrote:
> I just looked at Alpha's atomic_dec_and_lock assembly and did something
> that should work for atomic_dec_and_lock_irqsave. I think it works but I
> would prefer for someone from the Alpha-Camp to ack this before it goes
> in. It is not critical because the non-optimized version should work.

I would vote to simply delete this entire file and get alpha on the
generic code.

Afaict, this asm gets the ordering wrong, and I doubt it is much faster
than using atomic_add_unless() in any case (+- the ordering of course).

>  arch/alpha/lib/dec_and_lock.c | 33 ++++++++++++++++++++++++++-------
>  1 file changed, 26 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/alpha/lib/dec_and_lock.c b/arch/alpha/lib/dec_and_lock.c
> index 069fef7372dc..d29ba1de4f68 100644
> --- a/arch/alpha/lib/dec_and_lock.c
> +++ b/arch/alpha/lib/dec_and_lock.c
> @@ -32,6 +32,28 @@ _atomic_dec_and_lock:                              \n\
>       .previous                               \n\
>       .end _atomic_dec_and_lock");
>  
> +  asm (".text                                        \n\
> +     .global _atomic_dec_and_lock_irqsave    \n\
> +     .ent _atomic_dec_and_lock_irqsave       \n\
> +     .align  4                               \n\
> +_atomic_dec_and_lock_irqsave:                        \n\
> +     .prologue 0                             \n\
> +1:   ldl_l   $1, 0($16)                      \n\
> +     subl    $1, 1, $1                       \n\
> +     beq     $1, 2f                          \n\
> +     stl_c   $1, 0($16)                      \n\
> +     beq     $1, 4f                          \n\
> +     mb                                      \n\
> +     clr     $0                              \n\
> +     ret                                     \n\
> +2:   br      $29, 3f                         \n\
> +3:   ldgp    $29, 0($29)                     \n\
> +     br      $atomic_dec_and_lock_irqsave1..ng       \n\
> +     .subsection 2                           \n\
> +4:   br      1b                              \n\
> +     .previous                               \n\
> +     .end _atomic_dec_and_lock_irqsave");
> +
>  static int __used atomic_dec_and_lock_1(atomic_t *atomic, spinlock_t *lock)
>  {
>       /* Slow path */
> @@ -43,14 +65,11 @@ static int __used atomic_dec_and_lock_1(atomic_t *atomic, 
> spinlock_t *lock)
>  }
>  EXPORT_SYMBOL(_atomic_dec_and_lock);
>  
> -int _atomic_dec_and_lock_irqsave(atomic_t *atomic, spinlock_t *lock,
> -                              unsigned long *flags)
> +static int __used atomic_dec_and_lock_irqsave1(atomic_t *atomic,
> +                                            spinlock_t *lock,
> +                                            unsigned long *flags)
>  {
> -     /* Subtract 1 from counter unless that drops it to 0 (ie. it was 1) */
> -     if (atomic_add_unless(atomic, -1, 1))
> -             return 0;
> -
> -     /* Otherwise do it the slow way */
> +     /* Slow way */
>       spin_lock_irqsave(lock, *flags);
>       if (atomic_dec_and_test(atomic))
>               return 1;
> -- 
> 2.17.1
> 
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