Christoph Lameter <[EMAIL PROTECTED]> wrote: > > Some of these have LL/SC or equivalent instead, but ARM5 and before, FRV, > > M68K before 68020 to name but a few. > > This is all pretty ancient hardware, right? And they are mostly single > processor so no need to worry about concurrency. Just disable interrupts.
No, they're not all ancient h/w, and "just disabling interrupts" can be really expensive. > > And anything that implements CMPXCHG with spinlocks is a really bad > > candidate for CMPXCHG-based rwsems. > > Those will optimize out if it is a single processor configuration. Not necessarily. Consider preemption. David - To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
