On Mon, Jun 2, 2014 at 11:10 AM,  <srinivas.kandaga...@linaro.org> wrote:

> From: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>
> MCIFIFOCNT register behaviour on Qcom chips is very different than the other
> pl180 integrations. MCIFIFOCNT register contains the number of
> words that are still waiting to be transferred through the FIFO. It keeps
> decrementing once the host CPU reads the MCIFIFO. With the existing logic and
> the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT
> register will always return transfer size before reading the FIFO.
> Also the data sheet states that "This register is only useful for debug
> purposes and should not be used for normal operation since it does not reflect
> data which may or may not be in the pipeline".
> This patch implements a qcom specific get_rx_fifocnt function which is
> implemented based on status register flags. Based on qcom_fifo flag in
> variant data structure, the corresponding get_rx_fifocnt function is selected.
> Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>

Reviewed-by: Linus Walleij <linus.wall...@linaro.org>

Linus Walleij
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