> Had a couple of problems along the way though. It seems that glibc's
> inb and outb are behaving a bit erratically at the moment. Not sure why;
> it's as if the memory was being mapped cached or something. For the time
> being I'm using a hacked implementation based on /dev/port but this is
> obviously not the best. Has anybody else seen this sort of thing on 21285
> hardware?
You may be seeing PCI write posting. Try reading a harmless port after
the outb calls
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