On Mon, 10 May 1999, Russell King - ARM Linux Admin wrote:
> They should all be 32-bit aligned. However, the pointer is to a
> 'memory area' of undefined size, not specifically a word in length.
Okay then; it just seemed to be that I could improve upon this:
and r2, r0, #7
mov r3, #1
mov r3, r3, lsl r2
SAVEIRQS(ip)
DISABLEIRQS(ip)
ldrb r2, [r1, r0, lsr #3]
orr r2, r2, r3
strb r2, [r1, r0, lsr #3]
RESTOREIRQS(ip)
to this:
mov r3, #1
SAVEIRQS(ip)
DISABLEIRQS(ip)
ldr r2, [r1]
orr r2, r2, r3, lsl r0
str r2, [r1]
RESTOREIRQS(ip)
but I remember very little about [Strong]ARM timing. With the assistance
of David Seal and Wilco D., I've hugely optimised the find_first_zero_bit()
and find_next_zero_bit() routines (see a current comp.sys.arm thread).
I notice that swathes of functions which clearly don't need IRQ protection
seem to be using the bitops.S routines, and this is sad -- the IRQ saving
overhead here is wasted. Is there some way to differentiate between
routines which need it and routines which don't?
Also, I suggest that the basic bit setting functions should/could be
made inline.
--
Chris <[EMAIL PROTECTED]> ( http://www.fluff.org/chris )
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