On Mon, Jul 19, 1999, Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote:
>Any clue about what's going on ? I think I have tried almost all possible
>configuration options of this ethernet chip, is it possible that there is
>some incompatibility between this chip and the 285 ?
Note that this is not a cache coherency problem, the bios runs with cache
off. I did add some cache flush/inval. code in case I want to turn the
cache on in a future version. Note that the linux pcnet driver needs to
be adapted for cache incoherency, but this is another matter and
apparently not the source of my problem.
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BenH. Web : <http://calvaweb.calvacom.fr/bh40/>
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