I don't know what the SA-1110 has to offer an ICE, so I'll just make a
general comment: the classic ICE approach (monitor all the wires going
into the CPU) is long obsolete. It doesn't have any value at all for
CPUs with effective caches.
IF your CPU has built-in mechanisms for ICE-like debugging, such as
trace, watch, break setting mechanisms, then you're in good shape.
These days, those mechanisms are often provided via the JTAG port,
which gives you ICE-like capabilities at extremely low cost (hundreds
of dollars vs. tens of thousands for clasical ICE).
Some CPUs provide watch etc. mechanisms under program control, which
means you can let gdb or equivalent control them.
When evaluating such things, consider very carefully what the actual
primitives are that exist in the hardware. For example, the MIPS
RM7000 has functions like this, but when you dig deeper, you find that
what's actually there is not useful at all (not good enough for real
work).
paul
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