We have been experiencing problems with the SA1111 audio recording
functions. Has anyone else seen this, or better yet, figured out a
workaround?
Using latest Assabet with Niponset board, I have been able to
isolate the problem to the SADRCS register in the SAC section of the SA-1111
chip.
The SA-1111 SADRSA (receive buffer A pointer) SADRCA (receive buffer
A count) SADRSB(receive buffer B pointer) and SADRCB(receive buffer B count)
registers are first properly initialized. I know that these are correct
because when I get DONEA flag the A buffer is filled in with the data I
would expect.
Also, when I get the DONEB flag the data in the B buffer is filled
in with the data I would expect. The problem is that the ping pong nature
for the receiver is either broken or I'm missing something. I am listing
six test sets with my results.
I would like you to give me your feed back on possible work arounds.
The following are six of the several tests I have run on the SADRCS
register (Note: the SADTCS register operates as I would expect and I do have
playback working, via DMA & interrupts from the memory on the Assabet
board).
TEST 1
------
Write 0 to SADRCS - disable receive DMA controller
Write 1 to SADRCS - Enable DMA (note: only doing this
in polled mode for these tests)
Write 11 to SADRCS - Set STARTA flag
Read 9 from SADRCS - Read DONEA flag set
Write 9 to SADRCS - Clear the DONEA flag
Read 1 from SADRCS - Dma enabled.
Write 11 to SADRCS - Set STARTA flag
Read 81 from SADRCS - BIU Set, No DONEA, Dead at this point can
set either STARTA/B and never get any more DONE flags.
TEST 2
------
Write 0 to SADRCS - disable receive DMA controller
Write 1 to SADRCS - Enable DMA (note: only doing this
in polled mode for these tests)
Write 51 to SADRCS - Set STARTA/STARTB flags
Read 89 from SADRCS - Read DONEA flag set, BIU set
Write 89 to SADRCS - Clear the DONEA flag
Read 81 from SADRCS - BIU Set, No DONEB, Dead at this point can
set either STARTA/B and never get any more DONE flags.
TEST 3
------
Write 0 to SADRCS - disable receive DMA controller
Write 1 to SADRCS - Enable DMA (note: only doing this
in polled mode for these tests)
Write 41 to SADRCS - Set STARTB flag
Read 21 from SADRCS - Read DONEB flag set
Write 21 to SADRCS - Clear the DONEB flag
Read 1 from SADRCS - Dma enabled.
Write 11 to SADRCS - Set STARTA flag
Read 81 from SADRCS - BIU Set, No DONEA, Dead at this point can
set either STARTA/B and never get any more DONE flags.
TEST 4
------
Write 0 to SADRCS - disable receive DMA controller
Write 1 to SADRCS - Enable DMA (note: only doing this
in polled mode for these tests)
Write 51 to SADRCS - Set STARTA/STARTB flags
Read 89 from SADRCS - Read DONEA flag set, BIU set
Write C9 to SADRCS - Clear the DONEA flag, set the STARTB flag
Read C1 from SADRCS - BIU Set, No DONEB, Dead at this point can
set either STARTA/B and never get any more DONE flags.
TEST 5
------
Write 0 to SADRCS - disable receive DMA controller
Write 1 to SADRCS - Enable DMA (note: only doing this
in polled mode for these tests)
Write 51 to SADRCS - Set STARTA/STARTB flags
Read 89 from SADRCS - Read DONEA flag set, BIU set>
Write 99 to SADRCS - Clear the DONEA flag, set STARTA
Read 91 from SADRCS - BIU Set, No DONEA, Dead at this point can
set either STARTA/B and never get any more DONE flags.
TEST 6
------
Write 0 to SADRCS - disable receive DMA controller
Write 1 to SADRCS - Enable DMA (note: only doing this
in polled mode for these tests)
Write 41 to SADRCS - Set STARTB flag
Read 21 from SADRCS - Read DONEB flag set
Write 21 to SADRCS - Clear the DONEB flag
Read 1 from SADRCS - Dma enabled.
Write 41 to SADRCS - Set STARTB flag
Read 81 from SADRCS - BIU Set, No DONEB, Dead at this point can
set either STARTA/B and never get any more DONE flags.
It appears that the transition between buffers is broken, if the BIU
bit gets set we're done and no further activity happens on that record
channel.
Thanks,
Wayne G. Peters
Accelent Systems Inc.
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