On Fri, 12 May 2000 14:37:20 -0400 (EDT), Nicolas Pitre wrote:
> On Fri, 12 May -1, Erik Mouw wrote:
>> Nicolas Pitre also wrote a memory tester to one of the arm-linux lists,
>> but I can't find it in my archive (Nico?).
>
> I posted it to sa1100-linux. I wish someone still has it in his archives
> because the version I posted was specially cleaned and commented...
> However I don't know if and where I put it.
Yup, found it, it is attached. My sa1100-linux archive goes back until
July 5, 1999, so it is quite large and it took me some time to find your
message.
Erik
--
"[Microsoft] ... guarantees 99.8% NT uptime for certain hard-/software.
That's exactly the 3 minutes daily that my NT server needs to reboot."
-- ZDnet editorial
/*
* Memory test for the SA1100
* (C) Nicolas Pitre <[EMAIL PROTECTED]>
*/
/*
* void test_mem( unsigned long mem_start, unsigned long mem_size )
* Full memory test.
* Entry: r0 = memory start
* r1 = memory size (contigous)
* Return: r0 = memory size
* (if we reach the end, memory is OK)
* Clubbered: all registers (can't return to C functions)
*
* Note: This code must run with data cache turned off. Also should probably
* be executed from flash, unless you test a different memory bank.
*/
.align
.globl test_mem_
test_mem_:
MOV r9, lr @ pr�serve lr
MOV r12, r0 @ ram_start
MOV r13, r1 @ ram_size
#if 1
@ Alias memory test (we write the address at address...)
@ Destructive memory test (content is lost)
MOV r8, r12
ADD r6, r12, r13
5:
LDR r5, =0x3ffff
TST r8, r5
BNE 1f
MOV r0, r8
MOV r1, #1
BL puthex_
MOV r0, #'\r'
BL putc_
1: STR r8, [r8],#4 @ write address at address
CMP r8, r6
BNE 5b
MOV r8, r12
ADD r6, r12, r13
6:
LDR r5, =0x3ffff
TST r8, r5
BNE 1f
MOV r0, r8
MOV r1, #1
BL puthex_
MOV r0, #'\r'
BL putc_
1: LDR r0, [r8]
CMP r8, r0
MOVNE r1, r8
BNE errormem
ADD r8, r8, #4
CMP r8, r6
BNE 6b
#endif
#if 1
@ Cookie test (for stall bits, etc)
@ This test preserves memory content i.e. non-destructive
LDR r10, =0x55aacc33 @ cookie
MVN r11, r10 @ negative cookie
MOV r8, r12
ADD r6, r12, r13
4:
LDR r5, =0x3ffff
TST r8, r5
BNE 1f
MOV r0, r8
MOV r1, #1
BL puthex_
MOV r0, #'\r'
BL putc_
1: LDR r7, [r8]
STR r10, [r8]
LDR r0, [r8]
CMP r10, r0
MOVNE r1, r10
BNE errormem
STR r11, [r8]
LDR r0, [r8]
CMP r11, r0
MOVNE r1, r11
BNE errormem
STR r7, [r8],#4
CMP r8, r6
BNE 4b
#endif
ADR r0, StringMem2
BL puts_
MOV r0, r13 @ return RAM size
MOV pc, r9
StringMem2: .asciz "MEM test OK\r\n"
.align
errormem:
/* Display faulty memory address and content
* Here r8 contains faulty memory address
* r1 contains written value
* r0 contains read value
*/
MOV r6, r0 /* puthex clubbers up to r5 */
MOV r7, r1
ADR r0, StringError1
BL puts_
MOV r0, r8
MOV r1, #1
BL puthex_
ADR r0, StringError2
BL puts_
MOV r0, r7
MOV r1, #1
BL puthex_
ADR r0, StringError3
BL puts_
MOV r0, r6
MOV r1, #1
BL puthex_
BL RTLF_
B halt
StringError1: .asciz "Memory error at "
StringError2: .asciz ": wrote "
StringError3: .asciz ", read "
puts_:
MOV R3, R0
MOV R4, LR
1: LDRB R0, [R3], #1
CMP R0, #0
MOVEQ PC, R4
BL putc
B 1b
puthex_:
MOV R3, R0
MOV R4, #28
MOV R5, LR
CMP R1, #0
BEQ 1f
MOV R0, #'0'
BL putc
MOV R0, #'x'
BL putc
1: MOV R0, R3, LSR R4
AND R0, R0, #0xF
CMP R0, #10
ADDGE R0, R0, #'A' - 10
ADDLT R0, R0, #'0'
BL putc
SUBS R4, R4, #4
BGE 1b
MOV R0, R3
MOV PC, R5
RTLF:
RTLF_:
mov r3, lr
mov r0, #'\r'
bl putc
mov r0, #'\n'
bl putc
mov pc, r3
halt:
b halt
#define SerBase 0x80050000 @ Ser3
#define UTCR0 0x00
#define UTCR1 0x04
#define UTCR2 0x08
#define UTCR3 0x0c
#define UTDR 0x14
#define UTSR0 0x1c
#define UTSR1 0x20
#define UTSR1_TNF 0x00000004 /* Transmit FIFO Not Full */
putc:
putc_:
LDR R1, =SerBase @ serial base address
@ wait for space in fifo
1: LDR R2, [R1, #UTSR1]
TST R2, #UTSR1_TNF
BEQ 1b
STRB R0, [R1, #UTDR] @ write the char
MOV PC, LR
ine.
