on 3/26/00 8:14 PM, Paul Barton-Davis at [EMAIL PROTECTED] wrote:
>>> Do you have some magic that can magically convert a sample value in the
>>> range(s):
>>>
>>> -(2^24) ... -((2^8)+1) ... GAP ... (2^8)+1 ... (2^24) - 1
>>>
>>> to a scaled value without incredible processing penalties ?
>>>
>>> --p
>>>
>>
>> Huh? You argue for computation in the card's native format and then you
>> present a format that can't even be used mathematically without SOME kind of
>> conversion ??
>
> No, its not "the card's native format". Its just a 32 bit sample value
> that just so happens to never be transmitted from the h/w containing
> values between -256 .. 256. You can treat it like a 32 bit value for
> almost all purposes, and indeed, everything that I know of that uses
> such hardware does so (and since this is essentially just one of the
> Xilinx FPGA's, quite a lot of h/w does this). For example, dB
> computations just need to know that the reference level is 257 instead
> of zero, etc. However, the one thing you can't do is to scale it in a
> computationally trivial way to a -1,+1 range.
I'm not familiar with whatever format you're talking about.
Is it 24 bits or 32? i.e. is there data in the lower 8 bits that is not
either zero or a replication of the higher order bits (a common technique of
extending bit fields) ?
>From what it sounds like you're saying there is no way to make this bits-in
equals bits out with a 24 bit mantissa in any case. So it doesn't matter if
you convert to [-1,+1] or any other range reprensentable by a 32 bit float.
--- james mccartney [EMAIL PROTECTED] <http://www.audiosynth.com>
SuperCollider - a real time synthesis programming language for the PowerMac.
<ftp://www.audiosynth.com/pub/updates/SC2.2.7.sea.hqx>
