[Steve Harris <[EMAIL PROTECTED]>]
|
| Known nominal 0db value (e.g. 1.0f)
| Minimum sample rate (e.g. 44.1k's)
| Guaranteed 2^n block size
Somewhere (in a diskmag) I read Tammo Hinrichs (writing about
his softsynth system)
"A bad idea, however, is to make your buffer sizes a power of two.
The times when ASM coders used AND operations to mask out the buffer
offsets
are over. Those one or two cycles for a compare operation don't
hurt. So, there's no reason for using power-of-two bffer sizes
except you may be used to it. And in fact, it's even better if
you don't. I won't go into too much detail here, but if you know
how a cache tag RAM works, you might realize that the CPU can
manage the cache better if the buffers start at "weird" addresses,
especially if you use multiple buffers at a time (eg. in the
same loop). Just make the buffer adderesses a multiple of 32,
don't make their sizes a power of two (or leave some space
between the buffers, even one dword is enough) and you're set."
I personally wondered what he meant here about the cache operation
of the CPU, anybody knows more about that and/or care to comment?
--
n
++k