>> i find the x86 hardware watchpoint way, way, way too slow to be >> useful, most of the time. on some hard problems in non-RT code, its >> the only way. in RT code, its worse than useless :( >> >> --p >> > >Really? I remember reading an Intel Pentium manual a while ago and >drooling over the debug registers. I thought code execution was only >slowed down when one wanted to trap the problem at the exact >instruction. If it was not in this mode then the CPU exception would >occur possibly several instructions after the fact. Anyways. Perhaps GDB >only uses the first mode mentioned. Cheers.
yes, but a hardware memory watch point is totally different than an instruction breakpoint. in the latter, you typically replace the relevant instruction with a special one that will signal the hardware, then the OS, then the debugger (via ptrace(2)). for a watch point, there is no way to know what instruction will write to what memory, so it can't be handled so efficiently. --p
