On Fri, Mar 2, 2018 at 8:57 AM, Linus Torvalds <torva...@linux-foundation.org> wrote: > > Like the page table caching entries, the memory type range registers > are really just "secondary information". They don't actually select > between PCIe and RAM, they just affect the behavior on top of that.
Side note: historically the two may have been almost the same, since the CPU only had one single unified bus for "memory" (whether that was memory-mapped PCI or actual RAM). The steering was external. But even back then you had extended bits to specify things like how the 640k-1M region got remapped - which could depend on not just the address, but on whether you read or wrote to it. The "lost" 384kB of RAM could either be remapped at a different address, or could be used for shadowing the (slow) ROM contents, or whatever. Linus