[PATCH v2 5/12] clk: samsung: exynos7: Corrects CMU_CCORE clocks names

[Alim Akhtar]

This patch renames CMU_CCORE clocks names to match with user manual.

Signed-off-by: Alim Akhtar <alim.akh...@samsung.com>
---
 drivers/clk/samsung/clk-exynos7.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos7.c 
b/drivers/clk/samsung/clk-exynos7.c
index 4bc4760a..b2daf19 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -551,7 +551,7 @@ CLK_OF_DECLARE(exynos7_clk_top1, 
"samsung,exynos7-clock-top1",
 /*
  * List of parent clocks for Muxes in CMU_CCORE
  */
-PNAME(mout_aclk_ccore_133_p)   = { "fin_pll", "dout_aclk_ccore_133" };
+PNAME(mout_aclk_ccore_133_user_p)      = { "fin_pll", "aclk_ccore_133" };
 
 static unsigned long ccore_clk_regs[] __initdata = {
        MUX_SEL_CCORE,
@@ -559,7 +559,7 @@ static unsigned long ccore_clk_regs[] __initdata = {
 };
 
 static struct samsung_mux_clock ccore_mux_clks[] __initdata = {
-       MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_p,
+       MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_user_p,
                MUX_SEL_CCORE, 1, 1),
 };
 
-- 
1.7.10.4

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