Hi Bhupesh,
On Fri, Oct 16, 2015 at 1:41 AM, Sharma Bhupesh <[email protected]> wrote: > I think this can be moved to the generic bindings for DWC3 PCIe driver. > However > I cannot vouch if the same is true for usage of this IP in other SoCs and it > will not break existing drivers if this property is not defined in their SoC > DTSI. > > So adding a few old ST colleagues (Pratyush, Gabriel, Fabrice), who I am sure > have used this IP in ST SoCs > for their comments as well. Sorry for delayed response. Was on leave and away from internet. > > So the question would be - do you think it will be ok to make the clock > related > properties optional in 'designware-pcie.txt' rather than required. I think they should have been optional. ~Pratyush -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
