On Sat, 14 Nov 1998, Randy Edwards wrote:
>Does anyone have a working setup for /etc/isapnp.conf for this card that
>they'd be willing to send me; if so I'd greatly appreciate it.
I have exactly such a card. My "/etc/isapnp.conf" file is attached to this
reply.
You also have to be sure that your kernel knows how to communicate with the
card. If you have a RedHat system, then place the following into
"/etc/conf.modules":
alias sound sb
options sb io=0x220 irq=5 dma=1,5
If you don't have RedHat, and since the RedHat modular sound patch is not in
the 2.0.x kernels, you'll have to rebuild your kernel with the right SB
parameters.
#
# Sound
#
CONFIG_SOUND=m
# CONFIG_PAS is not set
CONFIG_SB=y
CONFIG_ADLIB=y
# CONFIG_GUS is not set
# CONFIG_MPU401 is not set
# CONFIG_UART6850 is not set
# CONFIG_PSS is not set
# CONFIG_GUS16 is not set
# CONFIG_GUSMAX is not set
CONFIG_MSS=y
# CONFIG_SSCAPE is not set
# CONFIG_TRIX is not set
# CONFIG_MAD16 is not set
# CONFIG_CS4232 is not set
# CONFIG_MAUI is not set
CONFIG_AUDIO=y
CONFIG_MIDI=y
# CONFIG_YM3812 is not set
SBC_BASE=220
SBC_IRQ=5
SBC_DMA=1
SB_DMA2=5
SB_MPU_BASE=330
SB_MPU_IRQ=-1
MSS_BASE=530
MSS_IRQ=11
MSS_DMA=3
DSP_BUFFSIZE=65536
# CONFIG_LOWLEVEL_SOUND is not set
--
Dave Mielke | 856 Grenon Avenue
Phone: 1-613-726-0014 | Ottawa, Ontario
EMail: [EMAIL PROTECTED] | Canada K2B 6G3
# $Id: pnpdump.c,v 1.15a 1998/05/25 17:22:16 fox Exp $
# This is free software, see the sources for details.
# This software has NO WARRANTY, use at your OWN RISK
#
# For details of this file format, see isapnp.conf(5)
#
# For latest information on isapnp and pnpdump see:
# http://www.roestock.demon.co.uk/isapnptools/
#
# Compiler flags: -DREALTIME -DNEEDSETSCHEDULER
#
# Trying port address 0203
# Board 1 has serial identifier 06 03 c2 b1 48 c5 00 8c 0e
# (DEBUG)
(READPORT 0x0203)
(ISOLATE PRESERVE)
(IDENTIFY *)
# Card 1: (serial identifier 06 03 c2 b1 48 c5 00 8c 0e)
# CTL00c5 Serial No 63091016 [checksum 06]
# Version 1.0, Vendor version 1.0
# ANSI string -->Creative SB AWE64 PnP<--
# Vendor defined tag: 73 02 45 01
#
# Logical device id CTL0045
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if
required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL00c5/63091016 (LD 0
# ANSI string -->Audio<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# IRQ 5.
# High true, edge sensitive interrupt (by default)
(INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
(DMA 0 (CHANNEL 1))
# Next DMA channel 5.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
(DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0220
# IO base alignment 1 bytes
# Number of IO addresses required: 16
(IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0330
# Maximum IO base address 0x0330
# IO base alignment 1 bytes
# Number of IO addresses required: 2
(IO 1 (BASE 0x0330))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
(IO 2 (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Start dependent functions: priority functional
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 16 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0394
# IO base alignment 4 bytes
# Number of IO addresses required: 4
# (IO 2 (BASE 0x0388))
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL7002
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if
required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL00c5/63091016 (LD 1
# Compatible device id PNPb02f
# ANSI string -->Game<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0200
# IO base alignment 1 bytes
# Number of IO addresses required: 8
(IO 0 (BASE 0x0200))
# Start dependent functions: priority acceptable
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0208
# IO base alignment 8 bytes
# Number of IO addresses required: 8
# (IO 0 (BASE 0x0200))
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL
