On Wed, Jun 28, 2017 at 1:02 AM, Logan Gunthorpe <log...@deltatee.com> wrote:
> This patch adds io{read|write}64[be] macros to point to the readq/writeq
> in use.
>
> This is because new drivers are encouraged to use ioreadXX, et al instead
> of readX[1], et al -- and mixing ioreadXX with readq is pretty ugly.
>
> [1] ldd3: section 9.4.2
>
> Signed-off-by: Logan Gunthorpe <log...@deltatee.com>
> cc: Christoph Hellwig <h...@lst.de>
> cc: Arnd Bergmann <a...@arndb.de>
> cc: Alan Cox <gno...@lxorguk.ukuu.org.uk>
> cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
> ---
> include/linux/io-64-nonatomic-hi-lo.h | 16 ++++++++++++++++
> include/linux/io-64-nonatomic-lo-hi.h | 16 ++++++++++++++++
> 2 files changed, 32 insertions(+)
>
> diff --git a/include/linux/io-64-nonatomic-hi-lo.h
> b/include/linux/io-64-nonatomic-hi-lo.h
> index defcc4644ce3..07a75831244f 100644
> --- a/include/linux/io-64-nonatomic-hi-lo.h
> +++ b/include/linux/io-64-nonatomic-hi-lo.h
> @@ -54,4 +54,20 @@ static inline void hi_lo_writeq_relaxed(__u64 val,
> volatile void __iomem *addr)
> #define writeq_relaxed hi_lo_writeq_relaxed
> #endif
>
> +#ifndef ioread64
> +#define ioread64 readq
> +#endif
This is wrong since ioread* is not the same read* on x86 and other
architectures that have native PCI PIO accessors, or that require
additional barriers for those.
You have to copy hi_lo_readq() here, and call ioread32 twice instead
of calling readl() twice. Same for iowrite64.
> +#ifndef ioread64be
> +#define ioread64be(p) be64_to_cpu(ioread64(p))
> +#endif
This has another problem: ioread64() is defined to access little-endian
registers, just like readq(). This means that instead of be64_to_cpu()
you need swab64() and always perform the byte swap, otherwise this
would be broken on big-endian architectures.
Arnd
