Linux-Development-Sys Digest #866, Volume #6 Wed, 23 Jun 99 14:14:16 EDT
Contents:
Re: PCI driver blues (Frank McGirt)
New Client/Server Development Questions (Frank McGirt)
Re: What about innovation? ("Francis Van Aeken")
----------------------------------------------------------------------------
From: [EMAIL PROTECTED] (Frank McGirt)
Subject: Re: PCI driver blues
Date: Wed, 23 Jun 1999 16:44:58 GMT
Danny,
Below are snippits from my driver for a PCI/VME
crate controller. It is more complicated than you
need because I support both the 2.0.36 and 2.2.7
and greater kernels (by recompilation only)
and also multiple PCI adapters.
I also suggest that you get a copy of
Linux Device Drivers by Rubini which is worth
the money for anyone writing drivers.
Also look at the web page for Kernel API changes from
2.0 to 2.2 by Richard Gooch. (Don't have the URL).
Hope this helps.
Frank McGirt
[EMAIL PROTECTED]
=======================================================================
>From init_module():
printk("<1>%s: Loading Driver For Multiple Bit3 617 PCI VME
Bus Controllers\n",PCI_DEVICE_NAME);
printk("<1>%s: F. McGirt, May 1999\n",PCI_DEVICE_NAME);
printk("<1>%s: Linux Kernel Version
%06x\n",PCI_DEVICE_NAME,LINUX_VERSION_CODE);
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
if( !pci_present() ) {
#else
if( !pcibios_present() ) {
#endif
printk("<1>%s: This Computer BIOS Doesn't Not Support
PCI, Aborting\n",PCI_DEVICE_NAME);
return -ENODEV;
}
// locate devices on PCI bus and get their configuration data
pciAll617BusData.number617Present = 0;
minorNumber = 1;
for( pciIndex = 0; pciIndex < PCI_MAX_NUMBER_617; pciIndex++ )
{
pciAll617BusData.pciBusIndex[pciIndex] = pciIndex;
pciAll617BusData.adapterPresent[pciIndex] = FALSE;
}
for( pciIndex = 0; pciIndex < PCI_MAX_NUMBER_617; pciIndex++ )
{
if(
GetPciConfigurationData(PCI_VENDOR_ID_BIT3,PCI_DEVICE_ID_BIT3_VME,pciIndex,
&pciConfigurationData[pciIndex],&pciRegionSizesData[pciIndex]) == 0 )
{
break;
}
pciAll617BusData.adapterPresent[pciIndex] = TRUE;
pciAll617BusData.number617Present++;
pciAll617BusData.pciSlotNumber[pciIndex] =
pci617Data[pciIndex].pciSlotNumber;
pciAll617BusData.baseMinorNodeNumber[pciIndex] =
minorNumber;
minorNumber += 5;
printk("<1>%s: 617 Device Located On PCI Bus, Bus
Index = %d\n",PCI_DEVICE_NAME,pciIndex);
printk("<1>%s: Slot Number = %d, Base Minor Node
Number = %d\n",PCI_DEVICE_NAME,
pciAll617BusData.pciSlotNumber[pciIndex],pciAll617BusData.baseMinorNodeNumber[pciIndex]);
PrintPciConfigurationData(pciConfigurationData[pciIndex],pciRegionSizesData[pciIndex]);
// save values in 617 configuration data structure for
each device present
pci617Data[pciIndex].irqLevel =
pciConfigurationData[pciIndex]._int_line;
pci617Data[pciIndex].baseMinorNodeNumber =
pciAll617BusData.baseMinorNodeNumber[pciIndex];
pci617Data[pciIndex].ioRegisterPhysicalAddress =
pciConfigurationData[pciIndex]._base0 & PCI_ACCESS_MASK;
pci617Data[pciIndex].ioRegisterPhysicalAddressSize =
pciRegionSizesData[pciIndex].base_address0_size;
pci617Data[pciIndex].ioMemMapRegisterPhysicalAddress =
pciConfigurationData[pciIndex]._base1 & PCI_ACCESS_MASK;
pci617Data[pciIndex].ioMemMapRegisterPhysicalAddressSize =
pciRegionSizesData[pciIndex].base_address1_size;
pci617Data[pciIndex].mappingRegisterPhysicalAddress =
pciConfigurationData[pciIndex]._base2 & PCI_ACCESS_MASK;
pci617Data[pciIndex].mappingRegisterPhysicalAddressSize =
pciRegionSizesData[pciIndex].base_address2_size;
pci617Data[pciIndex].remoteMemRegisterPhysicalAddress
= pciConfigurationData[pciIndex]._base3 & PCI_ACCESS_MASK;
pci617Data[pciIndex].remoteMemRegisterPhysicalAddressSize =
pciRegionSizesData[pciIndex].base_address3_size;
#ifdef EXTRA_PRINTS
printk("<1>%s: Interrupt Level =
%d\n",PCI_DEVICE_NAME,pci617Data[pciIndex].irqLevel);
printk("<1>%s: I/O Register Physical Address =
0x%08x\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].ioRegisterPhysicalAddress);
printk("<1>%s: Size Of I/O Region = 0x%08x
Bytes\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize);
printk("<1>%s: I/O Memory Map Register Physical
Address = 0x%08x\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].ioMemMapRegisterPhysicalAddress);
printk("<1>%s: Size Of Memory Mapped I/O Region =
0x%08x Bytes\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].ioMemMapRegisterPhysicalAddressSize);
printk("<1>%s: Mapping Register Physical Address =
0x%08x\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].mappingRegisterPhysicalAddress);
printk("<1>%s: Size Of Mapping Register Region =
0x%08x Bytes\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].mappingRegisterPhysicalAddressSize);
printk("<1>%s: Remote Memory Register Physical Address
= 0x%08x\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].remoteMemRegisterPhysicalAddress);
printk("<1>%s: Size Of Remote Memory Register Region =
0x%08x Bytes\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].remoteMemRegisterPhysicalAddressSize);
#endif
// check 617 i/o and memory regions to make sure not
locked by some other user
// the loop below may not necessary if the single
version of the driver is not installed
// if single installed always get i/o regions busy on
first try after a boot and ok thereafter
errorCount = 0;
for( i = 0; i < 100; i++ ) {
if( ( error =
check_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize) ) < 0 ) {
//printk("<1>%s: I/O Ports Are Busy,
Bus Index = %d, Error = %d\n",
//
PCI_DEVICE_NAME,pciIndex,error);
errorCount++;
}
else {
errorCount = 0;
break;
}
}
if( errorCount > 0 ) {
printk("<1>%s: I/O Ports Are Busy, Bus Index =
%d, Error = %d\n",
PCI_DEVICE_NAME,pciIndex,error);
errorCount = 1;
}
request_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize,PCI_DEVICE_NAME);
if( ( error =
check_region(pci617Data[pciIndex].ioMemMapRegisterPhysicalAddress,
pci617Data[pciIndex].ioMemMapRegisterPhysicalAddressSize) ) < 0 ) {
printk("<1>%s: Memory Mapped I/O Region Is Not
Available, Bus Index = %d, Error = %d\n",
PCI_DEVICE_NAME,pciIndex,error);
release_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize);
errorCount++;
}
if( ( error =
check_region(pci617Data[pciIndex].mappingRegisterPhysicalAddress,
pci617Data[pciIndex].mappingRegisterPhysicalAddressSize) ) < 0 ) {
printk("<1>%s: Mapping Register Region Is Not
Available, Bus Index = %d, Error = %d\n",
PCI_DEVICE_NAME,pciIndex,error);
release_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize);
errorCount++;
}
if( ( error =
check_region(pci617Data[pciIndex].remoteMemRegisterPhysicalAddress,
pci617Data[pciIndex].remoteMemRegisterPhysicalAddressSize) ) < 0 ) {
printk("<1>%s: Remote Memory Register Region
Is Not Available, Bus Index = %d, Error = %d\n",
PCI_DEVICE_NAME,pciIndex,error);
release_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize);
errorCount++;
}
if( errorCount > 0 ) {
printk("<1>%s: All 617 I/O And Memory Regions
Are NOT Available, Bus Index = %d, Error Count = %d\n",
PCI_DEVICE_NAME,pciIndex,errorCount);
}
else {
printk("<1>%s: All 617 I/O And Memory Regions
Are Available, Bus Index = %d\n",
PCI_DEVICE_NAME,pciIndex);
}
// set dma not in progress
dmaInProgress[pciIndex] = FALSE;
// map 617 memory regions to kernel address space
errorCount = 0;
pci617Data[pciIndex].IoMemMapRegisterKernelVirtualAddressMappedLength
=
pci617Data[pciIndex].ioMemMapRegisterPhysicalAddressSize;
pci617Data[pciIndex].IoMemMapRegisterKernelVirtualAddress =
#if LINUX_VERSION_CODE < LINUX_KERNEL_VERSION(2,2,7)
(u32)vremap(pci617Data[pciIndex].ioMemMapRegisterPhysicalAddress,
#else
(u32)ioremap(pci617Data[pciIndex].ioMemMapRegisterPhysicalAddress,
#endif
pci617Data[pciIndex].ioMemMapRegisterPhysicalAddressSize);
if(
pci617Data[pciIndex].IoMemMapRegisterKernelVirtualAddress == 0 ) {
printk("<1>%s: Unable To Map I/O Region, Bus
Index = %d\n",PCI_DEVICE_NAME,pciIndex);
release_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize);
errorCount++;
}
pci617Data[pciIndex].MappingRegisterKernelVirtualAddressMappedLength =
pci617Data[pciIndex].mappingRegisterPhysicalAddressSize;
pci617Data[pciIndex].MappingRegisterKernelVirtualAddress =
#if LINUX_VERSION_CODE < LINUX_KERNEL_VERSION(2,2,7)
(u32)vremap(pci617Data[pciIndex].mappingRegisterPhysicalAddress,
#else
(u32)ioremap(pci617Data[pciIndex].mappingRegisterPhysicalAddress,
#endif
pci617Data[pciIndex].mappingRegisterPhysicalAddressSize);
if(
pci617Data[pciIndex].MappingRegisterKernelVirtualAddress == 0 ) {
printk("<1>%s: Unable To Map Mapping Register
Region, Bus Index = %d\n",PCI_DEVICE_NAME,pciIndex);
release_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize);
errorCount++;
}
pci617Data[pciIndex].RemoteMemRegisterKernelVirtualAddressMappedLength
=
pci617Data[pciIndex].remoteMemRegisterPhysicalAddressSize;
pci617Data[pciIndex].RemoteMemRegisterKernelVirtualAddress =
#if LINUX_VERSION_CODE < LINUX_KERNEL_VERSION(2,2,7)
(u32)vremap(pci617Data[pciIndex].remoteMemRegisterPhysicalAddress,
#else
(u32)ioremap(pci617Data[pciIndex].remoteMemRegisterPhysicalAddress,
#endif
pci617Data[pciIndex].remoteMemRegisterPhysicalAddressSize);
if(
pci617Data[pciIndex].RemoteMemRegisterKernelVirtualAddress == 0 ) {
printk("<1>%s: Unable To Map Remote Memory
Register Region, Bus Index = %d\n",
PCI_DEVICE_NAME,pciIndex);
release_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize);
errorCount++;
}
if( errorCount > 0 ) {
printk("<1>%s: All 617 Memory Regions Are NOT
Mapped, Bus Index = %d, Error Count = %d\n",
PCI_DEVICE_NAME,pciIndex,errorCount);
}
else {
printk("<1>%s: All 617 Memory Regions Are
Mapped, Bus Index = %d\n",
PCI_DEVICE_NAME,pciIndex);
}
#ifdef EXTRA_PRINTS
printk("<1>%s: I/O Region Mapped To
0x%08x\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].IoMemMapRegisterKernelVirtualAddress);
printk("<1>%s: Mapping Register Region Mapped To
0x%08x\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].MappingRegisterKernelVirtualAddress);
printk("<1>%s: Remote Memory Register Region Mapped To
0x%08x\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].RemoteMemRegisterKernelVirtualAddress);
#endif
// setup interrupts - not currently implemented
//bit3_irq[pciIndex] = pciConfig[pciIndex]._int_line;
// initialize global semaphores
vme617_sem[pciIndex] = MUTEX;
} // end of locate 617 devices loop
// check if any devices found
if( pciAll617BusData.number617Present == 0 ) {
printk("<1>%s: No 617 Devices Located On PCI Bus,
Aborting\n",PCI_DEVICE_NAME);
return -ENODEV;
}
printk("<1>%s: Total Of %d 617 Devices Located On PCI
Bus\n",PCI_DEVICE_NAME,pciAll617BusData.number617Present);
// assign major device node number - note that all file ops
will be executed by
// or dispatched through vme617_base_fops
majorNodeNumber =
register_chrdev(PCI_MAJOR_NODE,PCI_DEVICE_NAME,
&vme617_base_fops);
if( majorNodeNumber < 0 ) {
printk("<1>%s: Unable To Get Major Device Node Number
%d, Abort\n",
PCI_DEVICE_NAME,PCI_MAJOR_NODE);
// release any memory mappings and dma buffers
for( pciIndex = 0; pciIndex < PCI_MAX_NUMBER_617;
pciIndex++ ) {
// check if specific device present
if( pciAll617BusData.adapterPresent[pciIndex]
) {
#if LINUX_VERSION_CODE < LINUX_KERNEL_VERSION(2,2,7)
vfree((void
*)pci617Data[pciIndex].RemoteMemRegisterKernelVirtualAddress);
vfree((void
*)pci617Data[pciIndex].MappingRegisterKernelVirtualAddress);
vfree((void
*)pci617Data[pciIndex].IoMemMapRegisterKernelVirtualAddress);
#else
iounmap((void
*)pci617Data[pciIndex].RemoteMemRegisterKernelVirtualAddress);
iounmap((void
*)pci617Data[pciIndex].MappingRegisterKernelVirtualAddress);
iounmap((void
*)pci617Data[pciIndex].IoMemMapRegisterKernelVirtualAddress);
#endif
release_region(pci617Data[pciIndex].ioRegisterPhysicalAddress,
pci617Data[pciIndex].ioRegisterPhysicalAddressSize);
}
}
return majorNodeNumber;
}
if( majorNodeNumber == 0 ) {
majorNodeNumber = PCI_MAJOR_NODE;
}
for( pciIndex = 0; pciIndex < PCI_MAX_NUMBER_617; pciIndex++ )
{
if( pciAll617BusData.adapterPresent[pciIndex] ) {
pci617Data[pciIndex].majorNodeNumber =
majorNodeNumber;
}
}
printk("<1>%s: Major Device Node Number Assigned =
%d\n",PCI_DEVICE_NAME,majorNodeNumber);
// register symbol table with kernel
//register_symtab(&vme617_symbols);
// setup dma buffers for present devices
for( pciIndex = 0; pciIndex < PCI_MAX_NUMBER_617; pciIndex++ )
{
if( pciAll617BusData.adapterPresent[pciIndex] ) {
order = get_order(MAX_DMA_BUFFER_SIZE);
dmaVirtualAddress =
__get_dma_pages(GFP_KERNEL,order);
if( dmaVirtualAddress == 0L ) {
printk("<1>%s: Unable To Allocate
Space For DMA Buffer, Bus Index = %d\n",
PCI_DEVICE_NAME,pciIndex);
pci617DmaAddressData[pciIndex].dmaAllowed = FALSE;
continue;
}
pci617DmaAddressData[pciIndex].dmaVirtualAddress = dmaVirtualAddress;
pci617DmaAddressData[pciIndex].dmaBusAddress =
virt_to_bus((void *)dmaVirtualAddress);
pci617DmaAddressData[pciIndex].dmaBufferOrder
= order;
pci617DmaAddressData[pciIndex].dmaBufferByteSize =
MAX_DMA_BUFFER_SIZE;
printk("<1>%s: DMA Buffer Memory Allocated,
Bus Index = %d\n",
PCI_DEVICE_NAME,pciIndex);
pci617DmaAddressData[pciIndex].dmaAllowed =
TRUE;
printk("<1>%s: DMA Buffer Virtual Address =
0x%08lx, Bus Index = %d\n",PCI_DEVICE_NAME,
pci617DmaAddressData[pciIndex].dmaVirtualAddress,pciIndex);
printk("<1>%s: DMA Buffer Bus Address =
0x%08lx, Bus Index = %d\n",PCI_DEVICE_NAME,
pci617DmaAddressData[pciIndex].dmaBusAddress,pciIndex);
// reserve dma buffer so as to be accessible
directly from user space
// the reserved bit must be set on each buffer
page so that mmap can use remap_page_range
// the dma buffer is assumed to be contiguous
since allocated by __get_dma_pages
max_page = MAX_DMA_BUFFER_SIZE / PAGE_SIZE;
paddr = dmaVirtualAddress;
down(&vme617_sem[pciIndex]);
for( i = 0; i < max_page; i++ ) {
page = &mem_map[MAP_NR(paddr)];
set_bit(PG_reserved,&page->flags);
paddr += PAGE_SIZE;
}
up(&vme617_sem[pciIndex]);
printk("<1>%s: DMA Buffer Memory Pages
Reserved, Bus Index = %d\n",
PCI_DEVICE_NAME,pciIndex);
}
}
===========================================================================================
// return order for specified byte memory size
static unsigned long get_order(unsigned long theSize)
{
int order;
unsigned long size;
size = ( theSize -1 ) >> (PAGE_SHIFT-1);
order = -1;
do {
size >>= 1;
order++;
} while( size );
return (unsigned long)order;
}
============================================================================================
// GetPciConfigurationData - get data from PCI Configuration Header
for specified device
static int GetPciConfigurationData(int vendor,int device,int
pciIndex,pciConfigurationHeader *pciConfig,
pciRegionSizes *pciSizes)
{
unsigned char pciBus;
unsigned char pciDeviceFn;
u32 mask;
u32 curr;
// locate device
pciBus = 0;
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pci_dev_ptr = pci_find_device(vendor,device,pci_dev_ptr);
if( pci_dev_ptr == NULL ) {
#else
if(
pcibios_find_device(vendor,device,pciIndex,&pciBus,&pciDeviceFn) != 0
) {
#endif
//printk("<1>%s: Unable To Locate A 617 For Bus Index
= %d\n",PCI_DEVICE_NAME,pciIndex);
return 0;
}
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pci617Data[pciIndex].pciBusNumber = pci_dev_ptr->bus->number &
0xff;
pciDeviceFn = pci_dev_ptr->devfn;
#else
pci617Data[pciIndex].pciBusNumber = pciBus & 0xff;
#endif
pci617Data[pciIndex].pciFunctionNumber =
PCI_FUNC(pciDeviceFn);
pci617Data[pciIndex].pciSlotNumber = PCI_SLOT(pciDeviceFn);
pci617Data[pciIndex].pciBusIndex = pciIndex;
printk("<1>%s: Located Device With Vendor ID = 0x%04x, Device
ID = 0x%04x,\n",
PCI_DEVICE_NAME,vendor,device);
printk("<1>%s: At Bus %d, Slot %d, Function 0x%02x, Index %d
\n",PCI_DEVICE_NAME,
pci617Data[pciIndex].pciBusNumber,pci617Data[pciIndex].pciSlotNumber,
pci617Data[pciIndex].pciFunctionNumber,pci617Data[pciIndex].pciBusIndex);
// get id data
pcibios_read_config_word(pciBus, pciDeviceFn, PCI_VENDOR_ID,
&pciConfig->_vendor);
pcibios_read_config_word(pciBus, pciDeviceFn, PCI_DEVICE_ID,
&pciConfig->_device);
pcibios_read_config_word(pciBus, pciDeviceFn, PCI_COMMAND,
&pciConfig->_command);
pcibios_read_config_word(pciBus, pciDeviceFn, PCI_STATUS,
&pciConfig->_status);
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_CLASS_REVISION, &pciConfig->_class_revision);
pcibios_read_config_byte(pciBus, pciDeviceFn,
PCI_CACHE_LINE_SIZE, &pciConfig->_cache_line_size);
pcibios_read_config_byte(pciBus, pciDeviceFn,
PCI_LATENCY_TIMER, &pciConfig->_latency_timer);
pcibios_read_config_byte(pciBus, pciDeviceFn, PCI_HEADER_TYPE,
&pciConfig->_header_type);
pcibios_read_config_byte(pciBus, pciDeviceFn, PCI_BIST,
&pciConfig->_bist);
// get physical addresses of regions and region sizes
// for 2.2.x kernels, get addresses and interrupt number from
pci_dev structure
// rather than from pci configuration space because kernel may
have mapped addresses
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_0, &curr);
cli();
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_0, ~0);
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_0, &mask);
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_0, curr);
sti();
pciConfig->_base0 = curr;
if( mask & PCI_BASE_ADDRESS_SPACE ) {
mask &= PCI_BASE_ADDRESS_IO_MASK;
}
else {
mask &= PCI_BASE_ADDRESS_MEM_MASK;
}
pciSizes->base_address0_size = ~mask + 1;
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pciConfig->_base0 = pci_dev_ptr->base_address[0];
#endif
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_1, &curr);
cli();
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_1, ~0);
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_1, &mask);
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_1, curr);
sti();
pciConfig->_base1 = curr;
if( mask & PCI_BASE_ADDRESS_SPACE ) {
mask &= PCI_BASE_ADDRESS_IO_MASK;
}
else {
mask &= PCI_BASE_ADDRESS_MEM_MASK;
}
pciSizes->base_address1_size = ~mask + 1;
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pciConfig->_base1 = pci_dev_ptr->base_address[1];
#endif
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_2, &curr);
cli();
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_2, ~0);
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_2, &mask);
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_2, curr);
sti();
pciConfig->_base2 = curr;
if( mask & PCI_BASE_ADDRESS_SPACE ) {
mask &= PCI_BASE_ADDRESS_IO_MASK;
}
else {
mask &= PCI_BASE_ADDRESS_MEM_MASK;
}
pciSizes->base_address2_size = ~mask + 1;
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pciConfig->_base2 = pci_dev_ptr->base_address[2];
#endif
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_3, &curr);
cli();
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_3, ~0);
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_3, &mask);
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_3, curr);
sti();
pciConfig->_base3 = curr;
if( mask & PCI_BASE_ADDRESS_SPACE ) {
mask &= PCI_BASE_ADDRESS_IO_MASK;
}
else {
mask &= PCI_BASE_ADDRESS_MEM_MASK;
}
pciSizes->base_address3_size = ~mask + 1;
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pciConfig->_base3 = pci_dev_ptr->base_address[3];
#endif
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_4, &curr);
cli();
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_4, ~0);
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_4, &mask);
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_4, curr);
sti();
pciConfig->_base4 = curr;
if( mask & PCI_BASE_ADDRESS_SPACE ) {
mask &= PCI_BASE_ADDRESS_IO_MASK;
}
else {
mask &= PCI_BASE_ADDRESS_MEM_MASK;
}
pciSizes->base_address4_size = ~mask + 1;
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pciConfig->_base4 = pci_dev_ptr->base_address[4];
#endif
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_5, &curr);
cli();
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_5, ~0);
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_5, &mask);
pcibios_write_config_dword(pciBus, pciDeviceFn,
PCI_BASE_ADDRESS_5, curr);
sti();
pciConfig->_base5 = curr;
if( mask & PCI_BASE_ADDRESS_SPACE ) {
mask &= PCI_BASE_ADDRESS_IO_MASK;
}
else {
mask &= PCI_BASE_ADDRESS_MEM_MASK;
}
pciSizes->base_address5_size = ~mask + 1;
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pciConfig->_base5 = pci_dev_ptr->base_address[5];
#endif
// get rest of data
pcibios_read_config_dword(pciBus, pciDeviceFn,
PCI_ROM_ADDRESS, &pciConfig->_baserom);
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pciConfig->_int_line = pci_dev_ptr->irq;
#else
pcibios_read_config_byte(pciBus, pciDeviceFn,
PCI_INTERRUPT_LINE, &pciConfig->_int_line);
#endif
pcibios_read_config_byte(pciBus, pciDeviceFn,
PCI_INTERRUPT_PIN, &pciConfig->_int_pin);
pcibios_read_config_byte(pciBus, pciDeviceFn, PCI_MIN_GNT,
&pciConfig->_min_gnt);
pcibios_read_config_byte(pciBus, pciDeviceFn, PCI_MAX_LAT,
&pciConfig->_max_lat);
// set the PCI Master Enable Bit if not yet set
#if LINUX_VERSION_CODE >= LINUX_KERNEL_VERSION(2,2,7)
pci_set_master(pci_dev_ptr);
printk("<1>%s: PCI Master Bit Set, Bus Index =
%d\n",PCI_DEVICE_NAME,pciIndex);
return(1);
#else
if( !( pciConfig->_command & PCI_COMMAND_MASTER ) ) {
pciConfig->_command |= PCI_COMMAND_MASTER;
printk("<1>%s: Setting PCI Master Bit, Bus Index =
%d\n",PCI_DEVICE_NAME,pciIndex);
pcibios_write_config_word(pciBus, pciDeviceFn,
PCI_COMMAND, pciConfig->_command);
}
else {
printk("<1>%s: PCI Master Bit Set, Bus Index =
%d\n",PCI_DEVICE_NAME,pciIndex);
}
return(1);
#endif
}
------------------------------
From: [EMAIL PROTECTED] (Frank McGirt)
Subject: New Client/Server Development Questions
Date: Wed, 23 Jun 1999 16:01:26 GMT
I have a data acquisition application running under Linux
2.2.x which consists of a kernel device driver to support
access to a PCI DAQ adapter, a C++ object which
provides a user space interface to the device driver
functions, and C++ objects using Qt to provide the GUI.
Absolutely no GUI support is present in the driver interface
object.
I wish to convert this to a client/server model with the
DAQ hardware, device driver, and interface object running
on one network node as a server while the GUI is implemented
as a client running on any other network node. For the
first implementation of this model, both nodes would be
Linux boxes and both client and server would be written
in C++. Later the expectation is that clients could be
customized to individual user requirements and written
in C++, Java, etc., and on Linux, Windows, or Mac OS
boxes.
I would like to implement the client/server object
interactions with CORBA and would like suggestions
for a reasonable CORBA ORB (free if possible) currently
running on Linux 2.2.x to attempt my first prototype
implementation.
Are there any? Is there example source code? Is this
a foolish thing to do? Etc.?
Thanks for any help or suggestions.
Frank McGirt
[EMAIL PROTECTED]
------------------------------
From: "Francis Van Aeken" <[EMAIL PROTECTED]>
Crossposted-To: comp.os.linux.advocacy
Subject: Re: What about innovation?
Date: Wed, 23 Jun 1999 15:20:36 +0200
Christopher Browne <[EMAIL PROTECTED]> a �crit dans le message :
gcWb3.72794$[EMAIL PROTECTED]
> You can't have it both ways. You *have* to pick one of:
> a) Outdated technology, or
> b) Outdated hardware.
Not necessarily. Some of the latest professional sound cards come with
drivers for BeOS. The potential is real.
> It is arguable that Be isn't much more than a rehashed cross between
> UNIX and MacOS.
It's exactly that kind of cross-fertilisation that we need (rather than just
mutation). BeOS allows me to do things (as a user and as a programmer)
which are harder to do with UNIX or MacOS.
I'm convinced that multimedia will be crucial in the future of computing.
So, I hope that BeOS (or a similar OS) will become a serious contender.
> It adds in message queues as a basic OS facility, and adds some
> filesystem functionality (e.g. - multiple streams, "file as
> namespace."), but isn't particularly novel in most respects, and borrows
> heavily from technologies you'd likely consider "outdated."
> That's not intended to indicate that Be is "bad;" on the contrary, if it
> has "stolen" good ideas from good systems, and integrates them together
> coherently, that can make for a very nice resulting system.
> Indeed, that is *precisely* where UNIX came from, as a sort of "cut
> down" version of Multics. UNIX's success may be attributed, in part, to
> a design based on distilling features from some of the better OSes of
> the '60s and '70s.
That's indeed how things evolve, and should evolve!
Francis.
------------------------------
** FOR YOUR REFERENCE **
The service address, to which questions about the list itself and requests
to be added to or deleted from it should be directed, is:
Internet: [EMAIL PROTECTED]
You can send mail to the entire list (and comp.os.linux.development.system) via:
Internet: [EMAIL PROTECTED]
Linux may be obtained via one of these FTP sites:
ftp.funet.fi pub/Linux
tsx-11.mit.edu pub/linux
sunsite.unc.edu pub/Linux
End of Linux-Development-System Digest
******************************
