> From: Nicolin Chen <nicol...@nvidia.com> > Sent: Friday, May 16, 2025 1:14 AM > > On Thu, May 15, 2025 at 08:27:17AM +0000, Tian, Kevin wrote: > > > From: Nicolin Chen <nicol...@nvidia.com> > > > Sent: Friday, May 9, 2025 11:03 AM > > > > > > /** > > > * struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware > > > information > > > * (IOMMU_HW_INFO_TYPE_ARM_SMMUV3) > > > * > > > - * @flags: Must be set to 0 > > > - * @impl: Must be 0 > > > + * @flags: Combination of enum iommu_hw_info_arm_smmuv3_flags > > > + * @impl: Implementation-defined bits when the following flags are set: > > > + * - IOMMU_HW_INFO_ARM_SMMUV3_HAS_TEGRA241_CMDQV > > > + * Bits[15:12] - Log2 of the total number of SID replacements > > > + * Bits[11:08] - Log2 of the total number of VINTFs per vIOMMU > > > + * Bits[07:04] - Log2 of the total number of VCMDQs per vIOMMU > > > + * Bits[03:00] - Version number for the CMDQ-V HW > > > > hmm throughout this series I drew an equation between VINTF > > and vIOMMU. Not sure how multiple VINTFs can be represented > > w/o introducing more objects. Do we want to keep such info here? > > You are right that VINTF=vIOMMU. This is a per SMMU instance ioctl. > So, each VM should only have one VTINF/vIOMMU per SMMU instance. > > For multi-VINTF (multi-vIOMMU) case, there needs to be more SMMUs > backing passthrough devices being assigned to the VM. > > What exactly the concern of keeping this info here?
First, you agreed that VINTF=vIOMMU, then "total number of VINTFs per vIOMMU" doesn't make sense as it's fixed to 1 in concept. Then, each VM can only get one VINTF/vIOMMU per SMMU instance, and this ioctl is per SMMU instance. This also implies that only one VINTF can be reported in the ioctl. In multi-VINTF case, the VM should get 1VINTF per ioctl from each SMMU backing passthrough devices. Then what is the point of " Bits[11:08] - Log2 of the total number of VINTFs per vIOMMU "? > > > > + * - suggest to back the queue memory with contiguous physical > > > pages or > > > + * a single huge page with alignment of the queue size, limit > > > vSMMU's > > > + * IDR1.CMDQS to the huge page size divided by 16 bytes > > > + */ > > > + IOMMU_HW_QUEUE_TYPE_TEGRA241_CMDQV = 1, > > > > Not sure about the last sentence. 'limit' refers to a certain action > > which the user should perform? > > Yes, set vSMMU's IDR1.CMDQS field up to the huge page size divided by > 16 bytes, e.g. if using one 2MB huge page backing the queue memory, > VMM should set IDR1.CMDQS no higher than 17: > 2MB = (1 << 17) * 16B > > Certainly, it can set to lower than 17. So it's an upper "limit". > > Or any better word in your mind that can be less confusing? No. I misread 'vSMMU' as 'SMMU'.
