Add dedicated DTs for the Spider CPU+BreakOut boards when used in PCIe RC/EP mode with DW PCIe eDMA based NTB transport.
* r8a779f0-spider-rc.dts describes the board in RC mode. It reserves 4 MiB of IOVA starting at 0xfe000000, which on this SoC is the ECAM/Config aperture of the PCIe host bridge. In stress testing with the remote eDMA, allowing generic DMA mappings to occupy this range led to immediate instability. The exact mechanism is under investigation, but reserving the range avoids the issue in practice. * r8a779f0-spider-ep.dts describes the board in EP mode. The RC interface is disabled and the EP interface is enabled. IPMMU usage matches the RC case. The base r8a779f0-spider.dts is intentionally left unchanged and continues to describe the default RC-only board configuration. Signed-off-by: Koichiro Den <[email protected]> --- arch/arm64/boot/dts/renesas/Makefile | 2 + .../boot/dts/renesas/r8a779f0-spider-ep.dts | 37 +++++++++++++ .../boot/dts/renesas/r8a779f0-spider-rc.dts | 52 +++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a779f0-spider-ep.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a779f0-spider-rc.dts diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 1fab1b50f20e..e8d312be515b 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -82,6 +82,8 @@ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak-panel-aa104xd12.dtb dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider.dtb +dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider-ep.dtb +dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider-rc.dtb dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f4-s4sk.dtb dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-ep.dts b/arch/arm64/boot/dts/renesas/r8a779f0-spider-ep.dts new file mode 100644 index 000000000000..6753f8497d0d --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-ep.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Device Tree Source for the Spider CPU and BreakOut boards + * (PCIe EP mode with DW PCIe eDMA used for NTB transport) + * + * Based on the base r8a779f0-spider.dts. + * + * Copyright (C) 2025 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a779f0-spider-cpu.dtsi" +#include "r8a779f0-spider-ethernet.dtsi" + +/ { + model = "Renesas Spider CPU and Breakout boards based on r8a779f0"; + compatible = "renesas,spider-breakout", "renesas,spider-cpu", + "renesas,r8a779f0"; +}; + +&i2c4 { + eeprom@51 { + compatible = "rohm,br24g01", "atmel,24c01"; + label = "breakout-board"; + reg = <0x51>; + pagesize = <8>; + }; +}; + +&pciec0 { + status = "disabled"; +}; + +&pciec0_ep { + iommus = <&ipmmu_hc 32>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-rc.dts b/arch/arm64/boot/dts/renesas/r8a779f0-spider-rc.dts new file mode 100644 index 000000000000..c7112862e1e1 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-rc.dts @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Device Tree Source for the Spider CPU and BreakOut boards + * (PCIe RC mode with remote DW PCIe eDMA used for NTB transport) + * + * Based on the base r8a779f0-spider.dts. + * + * Copyright (C) 2025 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a779f0-spider-cpu.dtsi" +#include "r8a779f0-spider-ethernet.dtsi" + +/ { + model = "Renesas Spider CPU and Breakout boards based on r8a779f0"; + compatible = "renesas,spider-breakout", "renesas,spider-cpu", + "renesas,r8a779f0"; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* + * Reserve 4 MiB of IOVA starting at 0xfe000000. Allowing DMA + * writes whose DAR (destination IOVA) falls numerically inside + * the ECAM/config window has been observed to trigger + * controller misbehavior. + */ + pciec0_iova_resv: pcie-iova-resv { + iommu-addresses = <&pciec0 0x0 0xfe000000 0x0 0x00400000>; + }; + }; +}; + +&i2c4 { + eeprom@51 { + compatible = "rohm,br24g01", "atmel,24c01"; + label = "breakout-board"; + reg = <0x51>; + pagesize = <8>; + }; +}; + +&pciec0 { + iommus = <&ipmmu_hc 32>; + iommu-map = <0 &ipmmu_hc 32 1>; + iommu-map-mask = <0>; + + memory-region = <&pciec0_iova_resv>; +}; -- 2.51.0
