On Wednesday 07 April 2004 12:56, Jesper Sörensen wrote: Thanks for testing that.
> dvb_ca_en50221_link_init > PRESTATUS: 43 > dvb_ca_en50221_wait_if_status > STATUS: 43 > dvb_ca_en50221_wait_if_status succeeded timeout:0 > dvb_ca_en50221_wait_if_status > STATUS: 43 > dvb_ca_en50221_wait_if_status failed timeout:101 > dvb_ca_en50221_read_data > dvb_ca: DVB CAM link initialisation failed :( OK, as its still failing, this means the Read Error bit is still set after it reads the transfer buffer size during the link initialisation process. This is definitely not right. So: either there's some extra wrinkle this CAM needs to work during initialisation, or writing to the CAM control register is not working right (ala ZetaCAM). If its the latter, theres not anything we can do, unless either TT fix it, or someone happens to know exactly what bits in the JEDEC fusemap for a Lattice M4A3-32/32 CPLD do what (the current theory is that its a timing problem when writing to IO space on the PC card). Either way, I think the next step is to wait until you have tested it under windows. -- Info: To unsubscribe send a mail to [EMAIL PROTECTED] with "unsubscribe linux-dvb" as subject.
